Intel 80C188XL Instruction Set Descriptions, Table C-4.Instruction Set Continued, C-39, Name

Models: 80C186XL 80C188XL

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INSTRUCTION SET DESCRIPTIONS

Table C-4. Instruction Set (Continued)

Name

Description

Operation

Flags

Affected

 

 

 

 

 

 

 

ROR

Rotate Right:

(temp) count

AF –

 

ROR dest, count

do while (temp) 0

CF

 

(CF) low-order bit of (dest)

DF –

 

Operates similar to ROL except that

 

(dest) (dest) / 2

IF –

 

the bits in the destination byte or word

 

high-order bit of (dest) (CF)

OF ¸

 

are rotated right instead of left.

(temp) (temp) – 1

PF –

 

Instruction Operands:

 

if

SF –

 

ROR reg, n

count = 1

TF –

 

ROR mem, n

then

ZF –

 

ROR reg, CL

if

 

 

ROR mem, CL

high-order bit of (dest)

 

 

 

next-to-high-order bit of (dest)

 

 

 

then

 

 

 

(OF) 1

 

 

 

else

 

 

 

(OF) 0

 

 

 

else

 

 

 

(OF) undefined

 

 

 

 

 

SAHF

Store Register AH Into Flags:

(SF):(ZF):X:(AF):X:(PF):X:(CF) (AH)

AF

 

SAHF

 

CF

 

 

DF –

 

Transfers bits 7, 6, 4, 2, and 0 from

 

 

 

IF –

 

register AH into SF, ZF, AF, PF, and CF,

 

 

 

OF –

 

respectively, replacing whatever

 

 

 

PF

 

values these flags previously had.

 

 

 

SF

 

Instruction Operands:

 

 

 

TF –

 

none

 

ZF ¸

 

 

 

 

NOTE: The three symbols used in the Flags Affected column are defined as follows:

the contents of the flag remain unchanged after the instruction is executed ¸? the contents of the flag is undefined after the instruction is executed

the flag is updated after the instruction is executed

C-39

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Intel 80C188XL Instruction Set Descriptions, Table C-4.Instruction Set Continued, C-39, Name, Operation, Flags, Affected