Intel 80C188XL OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE, 2.2.1.5Program Transfer Instructions

OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE

String instructions automatically update the SI register, the DI register, or both, before processing the next string element. The Direction Flag (DF) determines whether the index registers are auto- incremented (DF = 0) or auto-decremented (DF = 1). The processor adjusts the DI, SI, or both registers by one for byte strings or by two for word strings.

If a repeat prefix is used, the count register (CX) is decremented by one after each repetition of the string instruction. The CX register must be initialized to the number of repetitions before the string instruction is executed. If the CX register is 0, the string instruction is not executed and control goes to the following instruction.

Table 2-8. String Instruction Register and Flag Use

SI

DI

CX AL/AX

DF

ZF

Index (offset) for source string Index (offset) for destination string Repetition counter

Scan value

Destination for LODS

Source for STOS

Direction Flag

0= auto-increment SI, DI

1= auto-decrement SI, DI Scan/compare terminator

2.2.1.5Program Transfer Instructions

The contents of the Code Segment (CS) and Instruction Pointer (IP) registers determine the in- struction execution sequence in the 80C186 Modular Core family. The CS register contains the base address of the current code segment. The Instruction Pointer register points to the memory location of the next instruction to be fetched. In most operating conditions, the next instruction will already have been fetched and will be waiting in the CPU instruction queue. Program transfer instructions operate on the IP and CS registers. Changing the contents of these registers causes normal sequential operation to be altered. When a program transfer occurs, the queue no longer contains the correct instruction. The Bus Interface Unit obtains the next instruction from memory using the new IP and CS values. It then passes the instruction directly to the Execution Unit and begins refilling the queue from the new location.

The 80C186 Modular Core family offers four groups of program transfer instructions (see Table 2-9). These are unconditional transfers, conditional transfers, iteration control instructions and in- terrupt-related instructions.

2-23