Intel 80C186XL Instruction Set Descriptions, Table C-4.Instruction Set Continued, C-46, Name

INSTRUCTION SET DESCRIPTIONS

Table C-4. Instruction Set (Continued)

Name	Description	Operation	Flags
			Affected
WAIT	Wait:	None	AF –
	WAIT		CF –
			DF –
	Causes the CPU to enter the wait state
			IF –
	while its test line is not active.
			OF –
	Instruction Operands:
			PF –
	none		SF –
			TF –
			ZF –
XCHG	Exchange:	(temp) ← (dest)	AF –
	XCHG dest, src	(dest) ← (src)	CF –
		(src) ← (temp)	DF –
	Switches the contents of the source
			IF –
	and destination operands (bytes or
			OF –
	words). When used in conjunction with
			PF –
	the LOCK prefix, XCHG can test and
			SF –
	set a semaphore that controls access
			TF –
	to a resource shared by multiple
			ZF –
	processors.
	Instruction Operands:
	XCHG accum, reg
	XCHG mem, reg
	XCHG reg, reg

NOTE: The three symbols used in the Flags Affected column are defined as follows:

–the contents of the flag remain unchanged after the instruction is executed ¸? the contents of the flag is undefined after the instruction is executed

the flag is updated after the instruction is executed

C-46