Intel 80C186XL Opcode, Mod R/M, Displacement, BX or BP, SI or DI, 19.Based Index Addressing

Models: 80C186XL 80C188XL

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BX

OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE

Based index addressing generates an effective address that is the sum of a base register, an index register and a displacement (see Figure 2-19). The two address components can be determined at execution time, making this a very flexible addressing mode.

Opcode

Mod R/M

Displacement

BX

or

BP

Figure 2-19. Based Index Addressing +

SI

or

DI

Manual background +

EA

A1022-0A

Figure 2-19. Based Index Addressing

Based index addressing provides a convenient way for a procedure to address an array located on a stack (see Figure 2-20). The BP register can contain the offset of a reference point on the stack. This is typically the top of the stack after the procedure has saved registers and allocated local storage. The offset of the beginning of the array from the reference point can be expressed by a displacement value. The index register can be used to access individual array elements. Arrays contained in structures and matrices (two-dimensional arrays) can also be accessed with based indexed addressing.

String instructions do not use normal memory addressing modes to access operands. Instead, the index registers are used implicitly (see Figure 2-21). When a string instruction executes, the SI register must point to the first byte or word of the source string, and the DI register must point to the first byte or word of the destination string. In a repeated string operation, the CPU will auto- matically adjust the SI and DI registers to obtain subsequent bytes or words. For string instruc- tions, the DS register is the default segment register for the SI register and the ES register is the default segment register for the DI register. This allows string instructions to operate on data lo- cated anywhere within the 1 Mbyte address space.

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Intel 80C186XL, 80C188XL Opcode, Mod R/M, Displacement, BX or BP, SI or DI, OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE