Intel 80C188XL DMA Control Register, DxCON, Controls DMA channel parameters, Register Name

DIRECT MEMORY ACCESS UNIT

Register Name:	DMA Control Register
Register Mnemonic:	DxCON
Register Function:	Controls DMA channel parameters.

15

D	D	D	S
M	D	I	M
E	E	N	E
M	C	C	M

SS D I E N C C

TI C N T

S	S	P	I
Y	Y		D
N	N		R
1	0		Q

		0
C	S	W
H	T	O
G	R	R
	T	D

A1180-0A

Bit	Bit Name	Reset	Function
Mnemonic		State
DMEM	Destination	X	Selects memory or I/O space for the destination
	Address		pointer. Set DMEM to select memory space; clear
	Space		DMEM to select I/O space.
	Select
DDEC	Destination	X	Set DDEC to automatically decrement the destination
	Decrement		pointer after each transfer. (See Note.)
DINC	Destination	X	Set DINC to automatically increment the destination
	Increment		pointer after each transfer. (See Note.)
SMEM	Source	X	Selects memory or I/O space for the source pointer.
	Address		Set SMEM to select memory space; clear SMEM to
	Space		select I/O space.
	Select
SDEC	Source	X	Set SDEC to automatically decrement the source
	Decrement		pointer after each transfer. (See Note.)
SINC	Source	X	Set SINC to automatically increment the source
	Increment		pointer after each transfer. (See Note.)

NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written to a logic zero to ensure compatibility with future Intel products. A pointer remains constant if its increment and decrement bits are equal.

Figure 10-11. DMA Control Register

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