Intel 80C186XL, 80C188XL user manual Chapter Math Coprocessing

CONTENTS
10.1.3	DMA Requests		10-3
10.1.4	External Requests		10-4
10.1.4.1		Source Synchronization	10-5
10.1.4.2		Destination Synchronization	10-5
10.1.5	Internal Requests		10-6
10.1.5.1		Timer 2-Initiated Transfers	10-6
10.1.5.2		Unsynchronized Transfers	10-6
10.1.6	DMA Transfer Counts		10-7
10.1.7	Termination and Suspension of DMA Transfers		10-7
10.1.7.1		Termination at Terminal Count	10-7
10.1.7.2		Software Termination	10-7
10.1.7.3		Suspension of DMA During NMI	10-7
10.1.7.4		Software Suspension	10-7
10.1.8	DMA Unit Interrupts		10-8
10.1.9	DMA Cycles and the BIU		10-8
10.1.10	The Two-Channel DMA Unit		10-8
10.1.10.1		DMA Channel Arbitration	10-8
10.2 PROGRAMMING THE DMA UNIT			10-10
10.2.1	DMA Channel Parameters		10-10
10.2.1.1		Programming the Source and Destination Pointers	10-10
10.2.1.2		Selecting Byte or Word Size Transfers	10-14
10.2.1.3		Selecting the Source of DMA Requests	10-17
10.2.1.4		Arming the DMA Channel	10-18
10.2.1.5		Selecting Channel Synchronization	10-18
10.2.1.6		Programming the Transfer Count Options	10-18
10.2.1.7		Generating Interrupts on Terminal Count	10-19
10.2.1.8		Setting the Relative Priority of a Channel	10-19
10.2.2	Suspension of DMA Transfers		10-20
10.2.3	Initializing the DMA Unit		10-20
10.3 HARDWARE CONSIDERATIONS AND THE DMA UNIT			10-20
10.3.1	DRQ Pin Timing Requirements		10-20
10.3.2	DMA Latency		10-21
10.3.3	DMA Transfer Rates		10-21
10.3.4	Generating a DMA Acknowledge		10-22
10.4 DMA UNIT EXAMPLES			10-22
CHAPTER 11
MATH COPROCESSING
11.1 OVERVIEW OF MATH COPROCESSING			11-1
11.2 AVAILABILITY OF MATH COPROCESSING			11-1
11.3 THE 80C187 MATH COPROCESSOR			11-2
11.3.1	80C187 Instruction Set		11-2
11.3.1.1		Data Transfer Instructions	11-3
11.3.1.2		Arithmetic Instructions	11-3
11.3.1.3		Comparison Instructions	11-5

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