Intel 80C188XL, 80C186XL user manual 2.2SOFTWARE OVERVIEW, 2.2.1Instruction Set

OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE

2.2SOFTWARE OVERVIEW

All 80C186 Modular Core family members execute the same instructions. This includes all the 8086/8088 instructions plus several additions and enhancements (see Appendix A, “80C186 In- struction Set Additions and Extensions”). The following sections describe the instructions by cat- egory and provide a detailed discussion of the operand addressing modes.

Software for 80C186 core family systems need not be written in assembly language. The proces- sor provides direct hardware support for programs written in the many high-level languages available. The hardware addressing modes provide straightforward implementations of based variables, arrays, arrays of structures and other high-level language data constructs. A powerful set of memory-to-memory string operations allow efficient character data manipulation. Finally, routines with critical performance requirements can be written in assembly language and linked with high-level code.

2.2.1Instruction Set

The 80C186 Modular Core family instructions treat different types of operands uniformly. Nearly every instruction can operate on either byte or word data. Register, memory and immediate op- erands can be specified interchangeably in most instructions. Immediate values are exceptions: they must serve as source operands and not destination operands. Memory variables can be ma- nipulated (added to, subtracted from, shifted, compared) without being moved into and out of reg- isters. This saves instructions, registers and execution time in assembly language programs. In high-level languages, where most variables are memory-based, compilers can produce faster and shorter object programs.

The 80C186 Modular Core family instruction set can be viewed as existing on two levels. One is the assembly level and the other is the machine level. To the assembly language programmer, the 80C186 Modular Core family appears to have about 100 instructions. One MOV (data move) in- struction, for example, transfers a byte or a word from a register, a memory location or an imme- diate value to either a register or a memory location. The 80C186 Modular Core family CPUs, however, recognize 28 different machine versions of the MOV instruction.

The two levels of instruction sets address two requirements: efficiency and simplicity. Approxi- mately 300 forms of machine-level instructions make very efficient use of storage. For example, the machine instruction that increments a memory operand is three or four bytes long because the address of the operand must be encoded in the instruction. Incrementing a register, however, re- quires less information, so the instruction can be shorter. The 80C186 Core family has eight sin- gle-byte machine-level instructions that increment different 16-bit registers.

The assembly level instructions simplify the programmer’s view of the instruction set. The pro- grammer writes one form of an INC (increment) instruction and the assembler examines the op- erand to determine which machine level instruction to generate. The following paragraphs provide a functional description of the assembly-level instructions.

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