Intel 80C186XL, 80C188XL CSU Chip Select Device select, External Master Chip Select, 6.6EXAMPLES

CHIP-SELECT UNIT

6.5CHIP-SELECTS AND BUS HOLD

The Chip-Select Unit decodes only internally generated address and bus state information. An ex- ternal bus master cannot make use of the Chip-Select Unit. During HLDA, all chip-selects remain inactive.

The circuit shown in Figure 6-12 allows an external bus master to access a device during bus HOLD.

CSU Chip Select

Device select

External Master Chip Select

A1167-0A

Figure 6-12. Using Chip-Selects During HOLD

6.6EXAMPLES

The following sections provide examples of programming the Chip-Select Unit to meet the needs of a particular application. The examples do not go into hardware analysis or design issues.

6.6.1Example 1: Typical System Configuration

Figure 6-13 illustrates a block diagram of a typical system design with a 128 Kbyte EPROM and a 32 Kbyte SRAM. The peripherals are mapped to I/O address space. Example 6.1 shows a pro- gram template for initializing the Chip-Select Unit.

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