Intel 80C188XL 2.1.9Dynamically Relocatable Code, OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE

Models: 80C186XL 80C188XL

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Table 2-2. Logical Address Sources

OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE

Table 2-2. Logical Address Sources

Type of Memory Reference

Default

Alternate

Offset

Segment Base

Segment Base

 

 

 

 

 

 

Instruction Fetch

CS

NONE

IP

Stack Operation

SS

NONE

SP

Variable (except following)

DS

CS, ES, SS

Effective Address

String Source

DS

CS, ES, SS

SI

String Destination

ES

NONE

DI

BP Used as Base Register

SS

CS, DS, ES

Effective Address

 

 

 

 

Instructions are always fetched from the current code segment. The IP register contains the in- struction’s offset from the beginning of the segment. Stack instructions always operate on the cur- rent stack segment. The Stack Pointer (SP) register contains the offset of the top of the stack from the base of the stack. Most variables (memory operands) are assumed to reside in the current data segment, but a program can instruct the Bus Interface Unit to override this assumption. Often, the offset of a memory variable is not directly available and must be calculated at execution time. The addressing mode specified in the instruction determines how this offset is calculated (see “Ad- dressing Modes” on page 2-27). The result is called the operand’s Effective Address (EA).

Strings are addressed differently than other variables. The source operand of a string instruction is assumed to lie in the current data segment. However, the program can use another currently addressable segment. The operand’s offset is taken from the Source Index (SI) register. The des- tination operand of a string instruction always resides in the current extra segment. The destina- tion’s offset is taken from the Destination Index (DI) register. The string instructions automatically adjust the SI and DI registers as they process the strings one byte or word at a time.

When an instruction designates the Base Pointer (BP) register as a base register, the variable is assumed to reside in the current stack segment. The BP register provides a convenient way to ac- cess data on the stack. The BP register can also be used to access data in any other currently ad- dressable segment.

2.1.9Dynamically Relocatable Code

The segmented memory structure of the 80C186 Modular Core family allows creation of dynam- ically relocatable (position-independent) programs. Dynamic relocation allows a multiprogram- ming or multitasking system to make effective use of available memory. The processor can write inactive programs to a disk and reallocate the space they occupied to other programs. A disk-res- ident program can then be read back into available memory locations and restarted whenever it is needed. If a program needs a large contiguous block of storage and the total amount is available only in non-adjacent fragments, other program segments can be compacted to free enough con- tinuous space. This process is illustrated in Figure 2-9.

2-13

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Intel 80C188XL 2.1.9Dynamically Relocatable Code, OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE, 2.Logical Address Sources