Intel 80C186XL, 80C188XL user manual Clkout Hold Hlda DEN RD, WR, BHE, S20, DT/R Lock

BUS INTERFACE UNIT

CLKOUT
1	3	4
HOLD
	2
HLDA
		5
AD15:0
DEN
A19:16		5

RD, WR,

BHE, S2:0

DT/R,

LOCK

NOTES:

1.HLDA is deasserted, signaling need to run refresh bus cycle.

2.External bus master terminates use of the bus.

3.HOLD deasserted.

4.Hold may be reasserted after one clock.

5.BIU runs refresh cycle.

A1061-0A

Figure 3-35. Refresh Request During HOLD

The device requesting a bus hold must be able to detect a HLDA pulse that is one clock in dura- tion. A bus lockup (hang) condition can result if the requesting device fails to detect the short HLDA pulse and continues to wait for HLDA to be asserted while the BIU waits for HOLD to be deasserted. The circuit shown in Figure 3-36 can be used to latch HLDA.

3-42