Intel 80C186XL OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE, 2.2.2.2Memory Addressing Modes

OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE

Immediate operands are constant data contained in an instruction. Immediate data can be either 8 or 16 bits in length. Immediate operands are available directly from the instruction queue and can be accessed quickly. As with a register operand, no bus cycles need to be run to get an imme- diate operand. Immediate operands can be only source operands and must have a constant value.

2.2.2.2Memory Addressing Modes

Although the Execution Unit has direct access to register and immediate operands, memory op- erands must be transferred to and from the CPU over the bus. When the Execution Unit needs to read or write a memory operand, it must pass an offset value to the Bus Interface Unit. The Bus Interface Unit adds the offset to the shifted contents of a segment register, producing a 20-bit physical address. One or more bus cycles are then run to access the operand.

The offset that the Execution Unit calculates for memory operand is called the operand’s Effec- tive Address (EA). This address is an unsigned 16-bit number that expresses the operand’s dis- tance, in bytes, from the beginning of the segment in which it resides. The Execution Unit can calculate the effective address in several ways. Information encoded in the second byte of the in- struction tells the Execution Unit how to calculate the effective address of each memory operand. A compiler or assembler derives this information from the instruction written by the programmer. Assembly language programmers have access to all addressing modes.

The Execution Unit calculates the Effective Address by summing a displacement, the contents of a base register and the contents of an index register (see Figure 2-12). Any combination of these can be present in a given instruction. This allows a variety of memory addressing modes.

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