Intel 80C188XL, 80C186XL Instruction Set Descriptions, Table C-4.Instruction Set Continued, C-43

INSTRUCTION SET DESCRIPTIONS

Table C-4. Instruction Set (Continued)

Name	Description	Operation	Flags
			Affected
SHR	Shift Logical Right:	(temp) ← count	AF ?
	SHR dest, src	do while (temp) ≠ 0	CF
		(CF) ← low-order bit of (dest)	DF –
	Shifts the bits in the destination
		(dest) ← (dest) / 2	IF –
	operand (byte or word) to the right by
		(temp) ← (temp) – 1	OF
	the number of bits specified in the
		if	PF
	count operand. Zeros are shifted in on
		count = 1	SF
	the left. If the sign bit retains its original
		then	TF –
	value, then OF is cleared.
		if	ZF ¸
	Instruction Operands:	high-order bit of (dest) ≠
	SHR reg, n	next-to-high-order bit of (dest)
	SHR mem, n	then
	SHR reg, CL	(OF) ← 1
	SHR mem, CL	else
		(OF) ← 0
		else
		(OF) undefined
STC	Set Carry Flag:	(CF) ← 1	AF –
	STC		CF ¸
	Sets CF to 1.		DF –
			IF –
	Instruction Operands:
			OF –
	none		PF –
			SF –
			TF –
			ZF –
STD	Set Direction Flag:	(DF) ← 1	AF –
	STD		CF –
			DF ¸
	Sets DF to 1 causing the string instruc-
			IF –
	tions to auto-decrement the SI and/or
			OF –
	DI index registers.
			PF –
	Instruction Operands:
			SF –
	none		TF –
			ZF –

NOTE: The three symbols used in the Flags Affected column are defined as follows:

–the contents of the flag remain unchanged after the instruction is executed ¸? the contents of the flag is undefined after the instruction is executed

the flag is updated after the instruction is executed

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