Intel 80C186XL, 80C188XL DxSRCL, Register Name:DMA Source Address Pointer Low, Register Mnemonic

DIRECT MEMORY ACCESS UNIT

Register Name:DMA Source Address Pointer (Low)

Register Mnemonic: DxSRCL

Register Function:Contains the lower 16 bits of the DMA Source pointer.

15

D	D	D	D
S	S	S	S
A	A	A	A
1	1	1	1
5	4	3	2

D S A 1 1

DD S S A A

19

D S A 8

D	D	D
S	S	S
A	A	A
7	6	5

D S A 4

			0
D	D	D	D
S	S	S	S
A	A	A	A
3	2	1	0

A1177-0A

Bit	Bit Name	Reset	Function
Mnemonic		State
DSA15:0	DMA	XXXXH	DSA15:0 are driven on the lower 16 bits of the
	Source		address bus during the fetch phase of a DMA
	Address		transfer.

Figure 10-8. DMA Source Pointer (Low-Order Bits)

The address space referenced by the source and destination pointers is programmed in the DMA Control Register for the channel (see Figure 10-11 on page 10-15). The SMEM and DMEM bits control the address space (memory or I/O) for source pointer and destination pointer, respective- ly.

Automatic pointer indexing is also controlled by the DMA Control Register. Each pointer has two bits, increment and decrement, that control the indexing. If the increment and decrement bits for a pointer are programmed to the same value, then the pointer remains constant. The programmed data width (byte or word) for the channel automatically controls the amount that a pointer is in- cremented or decremented.

10-12