CONTENTS

TABLES

Table

 

 

 

 

 

 

Page

1-1

Comparison of 80C186 Modular Core Family Products

1-2

1-2

Related Documents and Software

1-3

2-1

Implicit Use of General Registers

2-5

2-2

Logical Address Sources

2-13

2-3

Data Transfer Instructions

2-18

2-4

Arithmetic Instructions

2-20

2-5

Arithmetic Interpretation of 8-Bit Numbers

2-21

2-6

Bit Manipulation Instructions

2-21

2-7

String Instructions

2-22

2-8

String Instruction Register and Flag Use

2-23

2-9

Program Transfer Instructions

2-25

2-10

Interpretation of Conditional Transfers

2-26

2-11

Processor Control Instructions

2-27

2-12

Supported Data Types

2-37

3-1

Bus Cycle Types

3-12

3-2

Read Bus Cycle Types

3-20

3-3

Read Cycle Critical Timing Parameters

3-20

3-4

Write Bus Cycle Types

3-23

3-5

Write Cycle Critical Timing Parameters

3-25

3-6

HALT Bus Cycle Pin States

3-29

3-7

Queue Status Signal Decoding

3-38

3-8

Signal Condition Entering HOLD

3-40

4-1

Peripheral Control Block

4-3

5-1

Suggested Values for Inductor L1 in Third Overtone Oscillator Circuit

5-4

6-1

Chip-Select Unit Registers

6-6

6-2

 

 

 

 

 

Block Size and Starting Address

6-12

UCS

6-3

LCS

 

 

......................................................................................................Active Range

6-4

MCS

 

.....................................................................................................Active Range

6-5

MCS

........................................................Block Size and Start Address Restrictions

6-6

PCS

......................................................................................................Active Range

7-1

Identification of Refresh Bus Cycles

7-5

8-1

Default Interrupt Priorities

8-3

8-2

Fixed Interrupt Types

8-9

8-3

Interrupt Control Unit Registers in Master Mode

8-11

8-4

Interrupt Control Unit Register Comparison

8-26

8-5

Slave Mode Fixed Interrupt Type Bits

8-26

9-1

Timer 0 and 1 Clock Sources

9-12

9-2

Timer Retriggering

9-13

11-1

80C187 Data Transfer Instructions

11-3

11-2

80C187 Arithmetic Instructions

11-4

11-3

80C187 Comparison Instructions

11-5

11-4

80C187 Transcendental Instructions

11-5

11-5

80C187 Constant Instructions

11-6

11-6

80C187 Processor Control Instructions

11-6

11-7

80C187 I/O Port Assignments

11-10

xiv

Page 15
Image 15
Intel 80C186XL, 80C188XL user manual Tables