5.6.1.4 Definition of Location Access Constraints
Location access constraints are imposed on overlapping read/write accesses. If u and v are overlapping read/write accesses, at least one of which is a write, then u and v must be compara- ble in the BEFORE (⇐ ) ordering, that is, either u ⇐ v or v ⇐ u.
There is no direct requirement that nonoverlapping accesses be comparable in the BEFORE (⇐ ) ordering.
All writes accessing any given byte are totally ordered, and any read or
5.6.1.5 Definition of Visibility
If u is a write access Pi:W<m>(x,a) and v is an overlapping read access Pj:R<n>(y,b), u is visi- ble to v only if:
u ⇐ v, or
u precedes v in processor issue sequence (possible only if Pi=Pj).
If u is a write access Pi:W<m>(x,a) and v is an overlapping instruction fetch Pj:I<4>(y,b), there are the following rules for visibility:
1.If u ⇐ v, then u is visible to v.
2.If u precedes v in processor issue sequence, then: a. If there is a write w such that:
u overlaps w and precedes w in processor issue sequence, and w is visible to v,
then u is visible to v.
b. If there is an instruction fetch w such that:
u is visible to w, and
w overlaps v and precedes v in processor issue sequence,
then u is visible to v.
3.If u does not precede v in either processor issue sequence or BEFORE order, then u is not visible to v.
Note that the rules of visibility for reads and instruction fetches are slightly different. If a write u precedes an overlapping instruction fetch v in processor issue sequence, but u is not BEFORE v, then u may or may not be visible to v.
5.6.1.6 Definition of Storage
The property of storage applies only to
The value read from any byte by a read access or instruction fetch v, is the value written by the latest (in BEFORE order) write u to that byte that is visible to v. More formally:
If u is Pi:W<m>(x,a), and v is either Pj:I<4>(y,b) or Pj:R<n>(y,b), and z is a byte accessed by both u and v, and u is visible to v; and there is no write that is AFTER u, is visible to v,
