Compaq ECQD2KCTE manual VAX Floating-Point Formats, Ffloating

A quadword is specified by its address A, the address of the byte containing bit 0. A quadword is a 64-bit value. When interpreted arithmetically, a quadword is either a two’s-complement integer with bits of increasing significance from 0 through 62 and bit 63 as the sign bit, or an unsigned integer with bits of increasing significance from 0 through 63.

Note:

Alpha implementations will impose a significant performance penalty when accessing quadword operands that are not naturally aligned. (A naturally aligned quadword has zero as the low-order three bits of its address.)

2.2.5 VAX Floating-Point Formats

VAX floating-point numbers are stored in one set of formats in memory and in a second set of formats in registers. The floating-point load and store instructions convert between these for- mats purely by rearranging bits; no rounding or range-checking is done by the load and store instructions.

2.2.5.1 F_floating

An F_floating datum is 4 contiguous bytes in memory starting on an arbitrary byte boundary. The bits are labeled from right to left, 0 through 31, as shown in Figure 2–5 .

Figure 2–5: F_floating Datum

31 16 15 14 7 6 0

Fraction Lo

S

Exp.

Frac. Hi :A

An F_floating operand occupies 64 bits in a floating register, left-justified in the 64-bit regis- ter, as shown in Figure 2–6.

Figure 2–6: F_floating Register Format

63 62 52 51 29 28 0

S

Exp.

Fraction

0

:Fx

The F_floating load instruction reorders bits on the way in from memory, expands the expo- nent from 8 to 11 bits, and sets the low-order fraction bits to zero. This produces in the register an equivalent G_floating number suitable for either F_floating or G_floating operations. The mapping from 8-bit memory-format exponents to 11-bit register-format exponents is shown in Table 2–1.This mapping preserves both normal values and exceptional values.

Basic Architecture 2–3