Compaq ECQD2KCTE manual Xfloating Datum, XFloating Big-Endian Formats

Figure 2–15: X_floating Datum

63 62	48 47	0
		Fraction_low
S	Exponent	Fraction_high

:A

:A+8

An X_floating datum occupies two consecutive even/odd floating-point registers (such as F4/F5), as shown in Figure 2–16.

Figure 2–16: X_floating Register Format

127 126 112 111 64 63 0

S Exponent

Fraction_high

Fraction_low

Fn OR 1 Fn

An X_floating datum is specified by its address A, the address of the byte containing bit 0. The form of an X_floating datum is sign magnitude with bit 127 the sign bit, bits <126:112> an excess–16383 binary exponent, and bits <111:0> a 112-bit fraction.

The value (V) of an X_floating number is inferred from its constituent sign (S), exponent (E), and fraction (F) fields as follows:

•If E=32767 and F<>0, then V is a NaN, regardless of S.

•If E=32767 and F=0, then V = (–1)**S x Infinity.

•If 0 < E < 32767, then V = (–1)**S x 2**(E–16383) x (1.F).

•If E=0 and F<> 0, then V = (–1)**S x 2**(–16382) x (0.F).

•If E = 0 and F = 0, then V = (–1)**S x 0 (zero).

Note:

Alpha implementations will impose a significant performance penalty when accessing X_floating operands that are not naturally aligned. (A naturally aligned X_floating datum has zero as the low-order four bits of its address.)

X_Floating Big-Endian Formats

Section 2.3 describes Alpha support for big-endian data types. It is intended that software or hardware implementation for a big-endian X_float data type comply with that support and have the following formats.

2–10Alpha Architecture Handbook