Compaq ECQD2KCTE manual Ieee Floating-Point Formats

Models: ECQD2KCTE

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The reordering of bits required for a D_floating load or store is identical to that required for a G_floating load or store. The G_floating load and store instructions are therefore used for load- ing or storing D_floating data.

A D_floating datum is specified by its address A, the address of the byte containing bit 0. The memory form of a D_floating datum is identical to an F_floating datum except for 32 addi- tional low significance fraction bits. Within the fraction, bits of increasing significance are from 48 through 63, 32 through 47, 16 through 31, and 0 through 6. The exponent conventions and approximate range of values is the same for D_floating as F_floating. The precision of a D_floating datum is approximately one part in 2**55, typically 16 decimal digits.

Notes:

D_floating is not a fully supported data type; no D_floating arithmetic operations are provided in the architecture. For backward compatibility, exact D_floating arithmetic may be provided via software emulation. D_floating "format compatibility"in which binary files of D_floating numbers may be processed, but without the last three bits of fraction precision, can be obtained via conversions to G_floating, G arithmetic operations, then conversion back to D_floating.

Alpha implementations will impose a significant performance penalty on access to D_floating operands that are not naturally aligned. (A naturally aligned D_floating datum has zero as the low-order three bits of its address.)

2.2.6 IEEE Floating-Point Formats

The IEEE standard for binary floating-point arithmetic, ANSI/IEEE 754-1985, defines four floating-point formats in two groups, basic and extended, each having two widths, single and double. The Alpha architecture supports the basic single and double formats, with the basic double format serving as the extended single format. The values representable within a format are specified by using three integer parameters:

P – the number of fraction bits

Emax – the maximum exponent

Emin – the minimum exponent

Within each format, only the following entities are permitted:

Numbers of the form (–1)**S x 2**E x b(0).b(1)b(2)..b(P–1) where:

S = 0 or 1

E = any integer between Emin and Emax, inclusive

b(n) = 0 or 1

Two infinities – positive and negative

At least one Signaling NaN

At least one Quiet NaN

NaN is an acronym for Not-a-Number. A NaN is an IEEE floating-point bit pattern that repre- sents something other than a number. NaNs come in two forms: Signaling NaNs and Quiet

2–6Alpha Architecture Handbook

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Compaq ECQD2KCTE manual Ieee Floating-Point Formats