Compaq ECQD2KCTE manual Big-Endian Addressing Support, Little-Endian Byte Addressing

•Trailing Numeric String

•Leading Separate Numeric String

•Packed Decimal String

2.3Big-Endian Addressing Support

Alpha implementations may include optional big-endian addressing support.

In a little-endian machine, the bytes within a quadword are numbered right to left:

Figure 2–23: Little-Endian Byte Addressing

7

6

5

4

3

2

1

0

In a big-endian machine, they are numbered left to right:

Figure 2–24: Big-Endian Byte Addressing

0

1

2

3

4

5

6

7

Bit numbering within bytes is not affected by the byte numbering convention (big-endian or lit- tle-endian).

The format for the X_floating big-endian data type is shown in Section 2.2.6.3.

The byte numbering convention does not matter when accessing complete aligned quadwords in memory. However, the numbering convention does matter when accessing smaller or unaligned quantities, or when manipulating data in registers, as follows:

•A quadword load or store of data at location 0 moves the same eight bytes under both numbering conventions. However, a longword load or store of data at location 4 must move the leftmost half of a quadword under the little-endian convention, and the right- most half under the big-endian convention. Thus, to support both conventions, the con- vention being used must be known and it must affect longword load/store operations.

•A byte extract of byte 5 from a quadword of data into the low byte of a register requires a right shift of 5 bytes under the little-endian convention, but a right shift of 2 bytes under the big-endian convention.

•Manipulation of data in a register is almost the same for both conventions. In both, inte- ger and floating-point data have their sign bits in the leftmost byte and their least signif- icant bit in the rightmost byte, so the same integer and floating-point instructions are

Basic Architecture 2–13