HP 8753E manual Test set switch, controlling the, 5-54 test using limits

Models: 8753E

1 699
Download 699 pages 49.83 Kb
Page 698
Image 698

hold mode, 6-20 interconnect location, 1-12

test set switch, controlling the, 5-54 test using limits, 2-53

time domain bandpass, 6-127 bandpass mode, 6-125

bandpass mode:reflection, 6-127 bandpass mode: transmission, 6- 129 concepts, 6-125-145

forward transform mode, 6-126 gating, 6-141

gating procedure, 2-85 general theory, 6-126 low pass, 6-130

low pass impulse mode, 6-125 low pass mode, fault location

measurements, 6-131

low pass mode, reflection, 6-131 low pass mode, transmission, 6-133

low pass, setting frequency range, 6-130 low pass step mode, 6-125

masking, 6-135 measurements, 2-83 option, 1-13 range, 6-138 reflection response, 2-88

relative velocity factor, 6-127 resolution, 6-139 transform, 6-7

transmission response measurement, 2-83 velocity factor, 2-90

windowing, 6-136 time domain range

dehning, 6-12

time for measurements, 7-16 time stamp, 4-30, 11-14 time-to-frequency domain, 6-126 title

area of display, l-9 of sequence, 2-73

the active channel display, 2-9 titling

the displayed measurement, 4-29 to use fast 2-port calibration, 5-54 trace math, 2-8

divide measurement data by the memory trace, 2-8

trace math operation, 6-6 trace noise

reducing, 5-57 trace viewing, 2-7 tracking, 6-60

an amplitude, 2-35 transfer formats, 7-17

transfer of data, 11-17 transform, 6-7

CW time-to-frequency domain, 6-142 frequency-to-time domain, 6-125 time-to-frequency domain, 6-126

transform measurements forward, 6-143

transform menu, 6-125 transform modes

time domain bandpass, 6-125

time domain low pass impulse, 6-125 time domain low pass step, 6-125

transistor test fixtures, 11-3 transmission measurements

using bandpass mode, 6-129 using low pass mode, 6-133

transmission response in time domain, 2-83 transmission tracking

uncorrected specifications, 7-3 trigger menu, 6-19

t&state drivers (E2), 11-19 TRL calibration, 2-91 TRL* error-correction, 5-24 TRL “ARM * calibration, 6-92

error model, 6-93

fabricating and defining standards, 6-98 how it works, 6-93

improving raw load match, 6-95 improving raw source match, 6-95 isolation, 6-94

load match, 6-95 options, 6-100 procedure, 6-97 reason for using, 6-92 requirements for standards, 6-97 source match, 6-95 terminology, 6-92

TRL*/LRM* two-port calibration, 6-81 TRL standard modification, 5-29 TRM* error-correction, 5-25

TRM standard modification, 5-31 trouble

solving for printing or plotting, 4-32 with disk storage, 4-43

tsH annotation, 6-20 tsH status notation, l-9 T (taIk mode), 11-20 TTL I/O, 6-148

tuned receiver mode, 3-17, 6-119 compatible sweep types, 2-66 description, 2-66

external source requirements, 2-67 making measurements, 2-66 mixer testing, 6-157

test setup, 2-66

Index-25

Page 698
Image 698
HP 8753E manual Test set switch, controlling the, 5-54 test using limits, Forward transform mode, 6-126 gating