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SRIO Registers
5.47LSUn Control Register 6 (LSUn_REG6)
There are four of these registers, one for each LSU.
Figure 103. LSUn Control Register 6 (LSUn_REG6)
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| Reserved |
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LEGEND: R = Read only; |
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0 | ||
Reserved | COMPLETION_CODE | BSY |
R- | ||
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| 0x00 |
LEGEND: R = Read only;
Table 77. LSUn Control Register 6 (LSUn_REG6) Field Descriptions
Bit | Field | Value | Description |
Reserved |
| Reserved | |
COMPLETION_C |
| Indicates the status of the pending command. | |
| ODE |
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| 000b | Transaction complete, No Errors |
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| 001b | Transaction Timeout occurred on |
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| 010 b | Transaction complete, Packet not sent due to flow control blockade (Xoff) |
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| 011b | Transaction complete, |
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| response payload length was in error |
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| 100b | Transaction complete, Packet not sent due to unsupported transaction type or invalid programming |
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| encoding for one or more LSU register fields |
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| 101b | DMA data transfer error |
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| 110b | "Retry" DOORBELL response received, or Atomic |
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| use) |
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| 111b | Transaction complete, Packet not sent due to unavailable outbound credit at given priority |
0 | BSY |
| Indicates status of the command registers. |
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| 0b | Command registers are available(writable) for next set of transfer descriptors |
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| 1b | Command registers are busy with current transfer |
148 | Serial RapidIO (SRIO) | SPRU976 |
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