Texas Instruments TMS320C645x manual Doorbell Operation

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SRIO Functional Description

2.3.6Doorbell

The doorbell operation, consisting of the DOORBELL and RESPONSE transactions (typically a DONE response), as shown in Figure 26, is used by a processing element to send a very short message to another processing element through the interconnect fabric. The DOORBELL transaction contains the info field to hold information and does not have a data payload. This field is software-defined and can be used for any desired purpose; see Section 3.1.4, Type 10 Packet Formats (Doorbell Class), for information about the info field. A processing element that receives a doorbell transaction takes the packet and puts it in a doorbell message queue within the processing element. This queue may be implemented in hardware or in local memory. This behavior is similar to that of typical message passing mailbox hardware. The local processor is expected to read the queue to determine the sending processing element and the info field, and determine what action to take.

The DOORBELL functionality is user-defined, but this packet type is commonly used to initiate CPU interrupts. A DOORBELL packet is not associated with a particular data packet that was previously transferred, so the info field of the packet must be configured to reflect the DOORBELL bit to be serviced for the correct TID info to be processed.

Figure 26. Doorbell Operation

PHY	TRA	LOG	TRA	LOG
10	2	4	16	32

PHY

16

acklD	rsv	prio	tt	1010	destID	sourcelD	Reserved			srcTID	info			info		CRC
5	3	2	2	4	8	8		8		8	8		8		16
						9				2	1		4
						Reserved			Doorbell			rsv	Doorbell

The DOORBELL packet’s 16-bit INFO field indicates which DOORBELL register interrupt bit to set. There are four DOORBELL registers, each currently with 16 bits, allowing 64 interrupt sources or circular buffers. Each bit can be assigned to any core as described below by the Interrupt Condition Routing Registers.

Additionally, each status bit is user-defined for the application. For instance, it may be desirable to support multiple priorities with multiple TID circular buffers per core if control data uses a high priority (i.e., priority

=2), while data packets are sent on priority 0 or 1. This allows the control packets to have preference in the switch fabric and arrive as quickly as possible. Since it may be required to interrupt the CPU for both data and control packet processing separately, separate circular buffers are used, and DOORBELL packets need to distinguish between them for interrupt servicing. If any reserved bit in the DOORBELL info field is set, an error response is sent.

SRIO_REGS->LSU1_Reg0 =	CSL_FMK( SRIO_LSU1_REG0_RAPIDIO_ADDRESS_MSB,0 );
SRIO_REGS->LSU1_Reg1 =	CSL_FMK( SRIO_LSU1_REG1_ADDRESS_LSB_CONFIG_OFFSET, 0);
SRIO_REGS->LSU1_Reg2 =	CSL_FMK( SRIO_LSU1_REG2_DSP_ADDRESS, 0);
SRIO_REGS->LSU1_Reg3 =	CSL_FMK( SRIO_LSU1_REG3_BYTE_COUNT, 0 );
SRIO_REGS->LSU1_Reg4 =	CSL_FMK( SRIO_LSU1_REG4_OUTPORTID,1 )
	CSL_FMK( SRIO_LSU1_REG4_PRIORITY,0 )
	CSL_FMK( SRIO_LSU1_REG4_XAMBS,0 )
	//no extended address
	CSL_FMK( SRIO_LSU1_REG4_ID_SIZE,1 )
	//tt = 0b01
	CSL_FMK( SRIO_LSU1_REG4_DESTID,0xBEEF )
	CSL_FMK( SRIO_LSU1_REG4_INTERRUPT_REQ,0 );
	//0 = event-driven, 1 = poll
SRIO_REGS->LSU1_Reg5 =	CSL_FMK( SRIO_LSU1_REG5_DRBLL_INFO,0x0000 )
	CSL_FMK( SRIO_LSU1_REG5_HOP_COUNT,0x03 )
	//hop = 0x03
	CSL_FMK( SRIO_LSU1_REG5_PACKET_TYPE,type );
	//type = REQ_DOORBELL
SPRU976 –March 2006	Serial RapidIO (SRIO)	59

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