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SRIO Registers
5.49Queue Transmit DMA Head Descriptor Pointer Registers (QUEUEn_TXDMA_HDP)
There are sixteen of these registers.
Figure 105. Queue Transmit DMA Head Descriptor Pointer Registers (QUEUEn_TXDMA_HDP)
TX_HDP
LEGEND: R = Read only;
TX_HDP
LEGEND: R = Read only;
Table 79. Queue Transmit DMA Head Descriptor Pointer Registers (QUEUEn_TXDMA_HDP) Field
Descriptions
Bit | Field | Value Description |
TX_HDP | This field is the host memory address for the first buffer descriptor in the transmit queue. This field | |
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| is written by the host to initiate queue transmit operations and is zeroed by the port when all |
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| packets in the queue have been transmitted. An error condition results if the host writes this field |
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| when the current field value is nonzero. The address must be |
150 | Serial RapidIO (SRIO) | SPRU976 |