Texas Instruments TMS320C645x manual RX Buffer Descriptor Field Descriptions

Models: TMS320C645x

1 218
Download 218 pages 2.08 Kb
Page 46
Image 46

www.ti.com

SRIO Functional Description

 

Table 17. RX Buffer Descriptor Field Descriptions (continued)

Field

Description

mailbox

Destination Mailbox: Specifies the mailbox to which the message was sent.

 

000000b: Mailbox 0

 

000001b: Mailbox 1

 

. . .

 

000100b: Mailbox 4

 

. . .

 

111111b: Mailbox 63

 

For multi-segment messages, only the two LSBs of this mailbox are valid. Hardware

 

ignores the four MSBs if the incoming message has multiple segments.

Although the switch fabric must deliver the segments of multi-packet messages in the order they were sent, buffer resources at the receiving endpoint may only become available after the initial segment(s) of a message have had to be retried. The peripheral can accept out-of-order segments and track completion of the overall message. Scenario A in Figure 20 shows this concept.

For applications that are set up for specific message flows between a single source and destination, it may require in-order delivery of messages. This is described in scenario B of Figure 20. This scenario is similar to scenario A, although one message may be retried due to a lack of receiver resources, subsequent pipelined messages may arrive just as resources are freed up. This is a problem for systems requiring in-order message delivery. In this case, the peripheral needs to record the Src_id/mailbox/letter of the first retried message and retry all subsequent new requests until resources are available and a segment for that Src_id/mailbox/letter is received. As long as all messages are from the same source and that source sends (and retries) packets in order, then all messages will be received in order. Note that this solution is less effective when multiple sources share an RxQ. The RX CPPI Control register (Address offset 0x0744) sets this mode of operation on all receive queues. Once this mode is set and a retry is issued, the queue will continue to wait for an incoming message that matches the Src_id/mailbox/letter combination. If no such packet arrives, the RX queue is unusable in a locked state. To reenable the queue, the in-order bit in the RX CPPI Control register must be disabled by software for that queue, after which it may be enabled again if desired. The in-order mode of operation is only valid on multi-segment queues because single-segment messages will never generate RETRY responses.

46

Serial RapidIO (SRIO)

SPRU976 –March 2006

Submit Documentation Feedback

Page 46
Image 46
Texas Instruments TMS320C645x manual RX Buffer Descriptor Field Descriptions