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SRIO Registers
5.7Block n Enable Register (BLKn_EN)
There are nine of these registers, one for each of nine logical blocks in the peripheral.
Figure 63. Block n Enable Register (BLKn_EN)
| |
Reserved |
|
| |
LEGEND: R = Read only; |
|
0 | |
Reserved | EN |
RW- | |
| Undefi |
| ned |
LEGEND: R = Read only; |
|
Table 34. Block n Enable Register (BLKn_EN) Field Descriptions
Bit | Field | Value | Description |
Reserved |
| Reserved | |
0 | EN |
| Controls reset to nth (0 to 8) clock/logical domain. |
|
| 0 | Logical block n disabled (held in reset, clocks disabled) |
|
| 1 | Logical block n enabled |
106 | Serial RapidIO (SRIO) | SPRU976 |