Texas Instruments TMS320C645x manual 150

Models: TMS320C645x

1 218
Download 218 pages 2.08 Kb
Page 8
Image 8

 

105

Queue Transmit DMA Head Descriptor Pointer Registers (QUEUEn_TXDMA_HDP)

.......................... 150

 

106

Queue Transmit DMA Completion Pointer Registers (QUEUEn_TXDMA_CP)

151

 

107

Queue Receive DMA Head Descriptor Pointer Registers (QUEUEn_RXDMA_HDP)

152

 

108

Queue Receive DMA Completion Pointer Registers (QUEUEn_RXDMA_CP)

153

 

109

Transmit Queue Teardown Register (TX_QUEUE_TEAR_DOWN)

154

 

110

Transmit CPPI Supported Flow Mask Registers n (TX_CPPI_FLOW_MASKSn)

155

 

111

Receive Queue Teardown Register (RX_QUEUE_TEAR_DOWN)

157

 

112

Receive CPPI Control Register (RX_CPPI_CNTL)

158

 

113

Transmit CPPI Weighted Round Robin Control Register 0 (TX_QUEUE_CNTL0)

159

 

114

Transmit CPPI Weighted Round Robin Control Register 1 (TX_QUEUE_CNTL1)

160

 

115

Transmit CPPI Weighted Round Robin Control Register 2 (TX_QUEUE_CNTL2)

161

 

116

Transmit CPPI Weighted Round Robin Control Register 3 (TX_QUEUE_CNTL3)

162

 

117

Mailbox-to-Queue Mapping Register Ln (RXU_MAP_Ln)

163

 

118

Mailbox-to-Queue Mapping Register Hn (RXU_MAP_Hn)

164

 

119

Flow Control Table Entry Registers (FLOW_CNTLn)

165

 

120

Device Identity CAR (DEV_ID)

166

 

121

Device Information CAR (DEV_INFO)

167

 

122

Assembly Identity CAR (ASBLY_ID)

168

 

123

Assembly Information CAR (ASBLY_INFO)

169

 

124

Processing Element Features CAR (PE_FEAT)

170

 

125

Source Operations CAR (SRC_OP)

171

 

126

Destination Operations CAR (DEST_OP)

172

 

127

Processing Element Logical Layer Control CSR (PE_LL_CTL)

173

 

128

Local Configuration Space Base Address 0 CSR (LCL_CFG_HBAR)

174

 

129

Local Configuration Space Base Address 1 CSR (LCL_CFG_BAR)

175

 

130

Base Device ID CSR (BASE_ID)

176

 

131

Host Base Device ID Lock CSR (HOST_BASE_ID_LOCK)

177

 

132

Component Tag CSR (COMP_TAG)

178

 

133

1x/4x LP_Serial Port Maintenance Block Header Register (SP_MB_HEAD)

179

 

134

Port Link Time-Out Control CSR (SP_LT_CTL)

180

 

135

Port Response Time-Out Control CSR (SP_RT_CTL)

181

 

136

Port General Control CSR (SP_GEN_CTL)

182

 

137

Port Link Maintenance Request CSR n (SPn_LM_REQ)

183

 

138

Port Link Maintenance Response CSR n (SPn_LM_RESP)

184

 

139

Port Local AckID Status CSR n (SPn_ACKID_STAT)

185

 

140

Port Error and Status CSR n (SPn_ERR_STAT)

186

 

141

Port Control CSR n (SPn_CTL)

188

 

142

Error Reporting Block Header (ERR_RPT_BH)

190

 

143

Logical/Transport Layer Error Detect CSR (ERR_DET)

191

 

144

Logical/Transport Layer Error Enable CSR (ERR_EN)

192

 

145

Logical/Transport Layer High Address Capture CSR (H_ADDR_CAPT)

193

 

146

Logical/Transport Layer Address Capture CSR (ADDR_CAPT)

194

 

147

Logical/Transport Layer Device ID Capture CSR (ID_CAPT)

195

 

148

Logical/Transport Layer Control Capture CSR (CTRL_CAPT)

196

 

149

Port-Write Target Device ID CSR (PW_TGT_ID)

197

 

150

Port Error Detect CSR n (SPn_ERR_DET)

198

 

151

Port Error Rate Enable CSR n (SPn_RATE_EN)

199

 

152

Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0)

200

 

153

Port n Packet/Control Symbol Error Capture CSR 1 (SPn_ERR_CAPT_DBG1)

201

 

154

Port n Packet/Control Symbol Error Capture CSR 2 (SPn_ERR_CAPT_DBG2)

202

 

155

Port n Packet/Control Symbol Error Capture CSR 3 (SPn_ERR_CAPT_DBG3)

203

 

156

Port n Packet/Control Symbol Error Capture CSR 4 (SPn_ERR_CAPT_DBG4)

204

 

157

Port Error Rate CSR n (SPn_ERR_RATE)

205

8

List of Figures

SPRU976 –March 2006

Submit Documentation Feedback

Page 8
Image 8
Texas Instruments TMS320C645x manual 150