Texas Instruments TMS320C645x manual Start Message Passing, Maintenance

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SRIO Functional Description

Figure 25. TX Buffer Descriptor

Descriptor

Buffer

Descriptor

Buffer

Tx

Pointer

Start Message Passing

SRIO_REGS->Queue0_RXDMA_HDP	=	(int	)RX_DESCP0_0	;
SRIO_REGS->Queue0_TxDMA_HDP	=	(int	)TX_DESCP0_0	;

Port Tx State

2.3.5Maintenance

The type 8 MAINTENANCE packet format accesses the RapidIO capability registers (CARs), command and status registers (CSRs), and data structures. Unlike other request formats, the type 8 packet format serves as both the request and the response format for maintenance operations. Type 8 packets contain no addresses and only contain data payloads for write requests and read responses. All configuration register read accesses are word (4-byte) accesses. All configuration register write accesses are also word (4-byte) accesses.

The wrsize field specifies the maximum size of the data payload for multiple double-word transactions. The data payload may not exceed that size but may be smaller if desired. Both the maintenance read and the maintenance write request generate the appropriate maintenance response.

The maintenance port-write operation is a write operation that does not have guaranteed delivery and does not have an associated response. This maintenance operation is useful for sending messages such as error indicators or status information from a device that does not contain an endpoint, such as a switch. The data payload is typically placed in a queue in the targeted endpoint and an interrupt is typically generated to a local processor. A port-write request to a queue that is full or busy servicing another request may be discarded.

	SRIO_REGS->LSU1_Reg0 =	CSL_FMK( SRIO_LSU1_REG0_RAPIDIO_ADDRESS_MSB,0 );
	SRIO_REGS->LSU1_Reg1 =	CSL_FMK( SRIO_LSU1_REG1_ADDRESS_LSB_CONFIG_OFFSET, (int )car_csr );
	SRIO_REGS->LSU1_Reg2 =	CSL_FMK( SRIO_LSU1_REG2_DSP_ADDRESS, (int )&xmtBuff[0]);
	SRIO_REGS->LSU1_Reg3 =	CSL_FMK( SRIO_LSU1_REG3_BYTE_COUNT,byte_count );
		//=4
	SRIO_REGS->LSU1_Reg4 =	CSL_FMK( SRIO_LSU1_REG4_OUTPORTID,0 )
		//0b00
		CSL_FMK( SRIO_LSU1_REG4_PRIORITY,0 )
		//0b00
		CSL_FMK( SRIO_LSU1_REG4_XAMBS,0 )
		//no extended address
		CSL_FMK( SRIO_LSU1_REG4_ID_SIZE,1 )
		//tt = 0b01
		CSL_FMK( SRIO_LSU1_REG4_DESTID,0xBEEF )
		//0xBEEF
		CSL_FMK( SRIO_LSU1_REG4_INTERRUPT_REQ,0 );
		//0 = event-driven, 1 = poll
	SRIO_REGS->LSU1_Reg5 =	CSL_FMK( SRIO_LSU1_REG5_DRBLL_INFO,0x0000 )
		CSL_FMK( SRIO_LSU1_REG5_HOP_COUNT,0x03 )
		//hop = 0x03
		CSL_FMK( SRIO_LSU1_REG5_PACKET_TYPE,type );
		//type = REQ_MAINT_RD
58	Serial RapidIO (SRIO)	SPRU976 –March 2006

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