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SRIO Registers
5.51Queue Receive DMA Head Descriptor Pointer Registers (QUEUEn_RXDMA_HDP)
There are sixteen of these registers.
Figure 107. Queue Receive DMA Head Descriptor Pointer Registers (QUEUEn_RXDMA_HDP)
RX_HDP
LEGEND: R = Read only;
RX_HDP
LEGEND: R = Read only;
Table 81. Queue Receive DMA Head Descriptor Pointer Registers (QUEUEn_RXDMA_HDP) Field
Descriptions
Bit | Field | Value Description |
RX_HDP | Rx Queue Head Descriptor Pointer: This field is the host memory address for the first buffer | |
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| descriptor in the channel receive queue. This field is written by the host to initiate queue receive |
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| operations and is zeroed by the port when all free buffers have been used. An error condition |
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| results if the host writes this field when the current field value is nonzero. The address must be |
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152 | Serial RapidIO (SRIO) | SPRU976 |