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SRIO Registers
5.50Queue Transmit DMA Completion Pointer Registers (QUEUEn_TXDMA_CP)
There are sixteen of these registers.
Figure 106. Queue Transmit DMA Completion Pointer Registers (QUEUEn_TXDMA_CP)
TX_CP
LEGEND: R = Read only;
TX_CP
LEGEND: R = Read only;
Table 80. Queue Transmit DMA Completion Pointer Registers (QUEUEn_TXDMA_CP) Field
Descriptions
Bit | Field | Value Description |
TX_CP | This field is the host memory address for the transmit queue completion pointer. This register is | |
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| written by the host with the buffer descriptor address for the last buffer processed by the host |
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| during interrupt processing. The port uses the value written to determine if the interrupt should be |
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| deasserted. |
SPRU976 | Serial RapidIO (SRIO) | 151 |
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