Texas Instruments TMS320C64x DSP manuals
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Texas Instruments TMS320C64x DSP Manual
306 pages 1.83 Mb
Preface 3 Read This FirstAbout This Manual Notational Conventions Related Documentation From Texas Instruments 4 Trademarks5 Contents11 Figures15 Tables18 Overview34 Video Port63 Video Capture PortChapter 364 3.1 Video Capture Mode SelectionTable 31. Video Capture Mode Selection 65 3.2 BT.656 Video Capture Mode74 3.3 Y/C Video Capture Mode79 3.4 BT.656 and Y/C Mode Field and Frame Operation88 3.5 Video Input Filtering93 3.6 Ancillary Data Capture3.6.1 Horizontal Ancillary (HANC) Data Capture 3.6.2 Vertical Ancillary (VANC) Data Capture 94 3.7 Raw Data Capture Mode99 3.8 TSI Capture Mode104 3.9 Capture Line Boundary Conditions106 3.10 Capturing Video in BT.656 or Y/C Mode108 3.11 Capturing Video in Raw Data Mode3.11.1 Handling FIFO Overrun Condition in Raw Data Mode 109 3.12 Capturing Data in TSI Capture Mode111 3.13 Video Capture RegistersTable 313. Video Capture Control Registers 112 Table 313. Video Capture Control Registers (Continued)3.13.1 Video Capture Channel x Status Register (VCASTAT, VCBSTAT) Figure 329. Video Capture Channel x Status Register (VCASTAT, VCBSTAT) 113 Table 314. Video Capture Channel x Status Register (VCxSTAT) Field Descriptions 114 Table 314. Video Capture Channel x Status Register (VCxSTAT)115 3.13.2 Video Capture Channel A Control Register (VCACTL)Figure 330. Video Capture Channel A Control Register (VCACTL) Field Descriptions 120 3.13.3 Video Capture Channel x Field 1 Start Register (VCASTRT1, VCBSTRT1)Figure 331. Video Capture Channel x Field 1 Start Register (VCASTRT1, VCBSTRT1) 121 Table 316. Video Capture Channel x Field 1 Start Register (VCxSTRT1) Field Descriptions122 3.13.4 Video Capture Channel x Field 1 Stop Register (VCASTOP1, VCBSTOP1)Figure 332. Video Capture Channel x Field 1 Stop Register (VCASTOP1, VCBSTOP1) Table 317. Video Capture Channel x Field 1 Stop Register (VCxSTOP1) Field Descriptions 123 3.13.5 Video Capture Channel x Field 2 Start Register (VCASTRT2, VCBSTRT2)Figure 333. Video Capture Channel x Field 2 Start Register (VCASTRT2, VCBSTRT2) Table 318. Video Capture Channel x Field 2 Start Register (VCxSTRT2) Field Descriptions 124 3.13.6 Video Capture Channel x Field 2 Stop Register (VCASTOP2, VCBSTOP2)Figure 334. Video Capture Channel x Field 2 Stop Register (VCASTOP2, VCBSTOP2) Table 319. Video Capture Channel x Field 2 Stop Register (VCxSTOP2) Field Descriptions 125 3.13.7 Video Capture Channel x Vertical Interrupt Register (VCAVINT, VCBVINT)Figure 335. Video Capture Channel x Vertical Interrupt Register (VCAVINT, VCBVINT) 126 Table 320. Video Capture Channel x Vertical Interrupt Register (VCxVINT)127 3.13.8 Video Capture Channel x Threshold Register (VCATHRLD, VCBTHRLD)128 Figure 336. Video Capture Channel x Threshold Register (VCATHRLD, VCBTHRLD)Table 321. Video Capture Channel x Threshold Register (VCxTHRLD) Field Descriptions 129 3.13.9 Video Capture Channel x Event Count Register (VCAEVTCT, VCBEVTCT)Figure 337. Video Capture Channel x Event Count Register (VCAEVTCT, VCBEVTCT) Table 322. Video Capture Channel x Event Count Register (VCxEVTCT) Field Descriptions 130 3.13.10 Video Capture Channel B Control Register (VCBCTL)Figure 338. Video Capture Channel B Control Register (VCBCTL) Field Descriptions 134 3.13.11 TSI Capture Control Register (TSICTL)Figure 339. TSI Capture Control Register (TSICTL) 135 Table 324. TSI Capture Control Register (TSICTL) Field Descriptions136 3.13.12 TSI Clock Initialization LSB Register (TSICLKINITL)Figure 340. TSI Clock Initialization LSB Register (TSICLKINITL) Table 325. TSI Clock Initialization LSB Register (TSICLKINITL) Field Descriptions 137 3.13.13 TSI Clock Initialization MSB Register (TSICLKINITM)Figure 341. TSI Clock Initialization MSB Register (TSICLKINITM) Table 326. TSI Clock Initialization MSB Register (TSICLKINITM) Field Descriptions 138 3.13.14 TSI System Time Clock LSB Register (TSISTCLKL)Figure 342. TSI System Time Clock LSB Register (TSISTCLKL) Table 327. TSI System Time Clock LSB Register (TSISTCLKL) Field Descriptions 139 3.13.15 TSI System Time Clock MSB Register (TSISTCLKM)Figure 343. TSI System Time Clock MSB Register (TSISTCLKM) Table 328. TSI System Time Clock MSB Register (TSISTCLKM) Field Descriptions 140 3.13.16 TSI System Time Clock Compare LSB Register (TSISTCMPL)Figure 344. TSI System Time Clock Compare LSB Register (TSISTCMPL) Table 329. TSI System Time Clock Compare LSB Register (TSISTCMPL) 141 3.13.17 TSI System Time Clock Compare MSB Register (TSISTCMPM)Figure 345. TSI System Time Clock Compare MSB Register (TSISTCMPM) Table 330. TSI System Time Clock Compare MSB Register (TSISTCMPM) 142 3.13.18 TSI System Time Clock Compare Mask LSB Register (TSISTMSKL)Figure 346. TSI System Time Clock Compare Mask LSB Register (TSISTMSKL) Table 331. TSI System Time Clock Compare Mask LSB Register (TSISTMSKL) 143 3.13.19 TSI System Time Clock Compare Mask MSB Register (TSISTMSKM)Figure 347. TSI System Time Clock Compare Mask MSB Register (TSISTMSKM) Table 332. TSI System Time Clock Compare Mask MSB Register (TSISTMSKM) 144 3.13.20 TSI System Time Clock Ticks Interrupt Register (TSITICKS)Figure 348. TSI System Time Clock Ticks Interrupt Register (TSITICKS) Table 333.TSI System Time Clock Ticks Interrupt Register (TSITICKS) Field Descriptions 145 3.14 Video Capture FIFO RegistersTable 334. Video Capture FIFO Registers Table 335. Video Capture FIFO Registers Function 146 Video Display Port268 VCXO Interpolated Control PortChapter 6This chapter provides an overview of the VCXO interpolated control (VIC) port. 269 6.1 OverviewFigure 61. TSI System Block Diagram 270 6.2 InterfaceTable 61. VIC Port Interface Signals 6.3 Operational DetailsFigure 62. Program Clock Reference (PCR) Header Format Equation 61. Relationship Between Interpolation Rate and Input Frequency Equation 62. Relationship of Frequency Multiplier to Precision 271 Table 62. Example Values for Interpolation Rate 272 6.4 Enabling VIC Port6.5 VIC Port Registers 277 Video Port Configuration Examples297 Index
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