Texas Instruments TMS320C64x DSP instruction

Display Timing Examples

Figure 4–38. Y/C Progressive Display Vertical Timing Example

FLCOUNT

EAV ILCOUNT V F

	§	§
	†	†
FLD	VBLNK	VSYNC

Active

Horizontal

Output

750

744

745

746

747

748

749

750

Field 1 Blanking

Field 1 Active

Field 1 Image

Field 1 Blanking

716	1	0
716	1	0
716	1	0
716	1	0
716	1	0
716	1	0
716	1	0
716	1	0
716	0	0
716	0	0
716	0	0

10 0

20 0

7150 0

7160 0

716	0	0
716	1	0
716	1	0
716	1	0
716	1	0
716	1	0
716	1	0
716	1	0

Blanking Value

Default Value§

FIFO Data

Default Value§

Blanking Value

IMGVOFF1 = 3	VBLNKXSTART1 = 1280	VSYNCXSTART1 = 1280	FLD1XSTART = n/a
IMGVSIZE1 = 716	VBLNKYSTART1 = 746	VSYNCYSTART1 = 1	FLD1YSTART = 1
IMGVOFF2 = n/a	VBLNKXSTOP1 = 1280	VSYNCXSTOP1 = 1280	FLD2XSTART = n/a
IMGVSIZE2 = n/a	VBLNKYSTOP1 = 26	VSYNCYSTOP1 = 6	FLD2YSTART = > 750
FRMHEIGHT = 750	VBLNKXSTART2 = n/a	VSYNCXSTART2 = n/a
VBITSET1 = 746	VBLNKYSTART2 = > 750	VSYNCYSTART2 = > 750	FBITSET = 1
VBITCLR1 = 26	VBLNKXSTOP2 = n/a	VSYNCXSTOP2 = n/a	FBITCLR = > 750
VBITSET2 = n/a	VBLNKYSTOP2 = > 750	VSYNCYSTOP2 = > 750
VBITCLR2 = n/a

† Assumes VCT2P bit in VPCTL is set to 1 (active-low output). VSYNC output when VCTL2S bit in VDCTL is set to 00, VBLNK output when VCTL2S bit is set 01.

§ If DVEN bit in VDCTL is set to 1; otherwise, blanking value is output

4-46

Video Display Port

SPRU629

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual 38. Y/C Progressive Display Vertical Timing Example

Models: TMS320C64x DSP

Figure 4–38. Y/C Progressive Display Vertical Timing Example

FLCOUNT

Active

VBLNKYSTOP2 = > 750

TMS320C64x DSP specifications