Index-3

Index

F1C bit	3-50
F1D bit	4-53
F2C bit	3-50
F2D bit	4-53

FBITCLR bits	4-89
FBITSET bits	4-89
FIFO overrun
BT.656 mode		3-45
raw data mode		3-47
TSI capture mode			3-48
video display		4-51
Y/C mode	3-45
FIFO packing
BT.656 mode		3-9
raw data mode		3-33
TSI capture mode			3-41
Y/C mode	3-14
FIFO unpacking
BT.656 mode		4-13
raw data mode		4-26
Y/C mode	4-17
FINV bit
in VCACTL	3-53
in VCBCTL	3-68

FLD1XSTART bits 4-74FLD1YSTART bits 4-74FLD2XSTART bits 4-75FLD2YSTART bits 4-75

FLDD bit 3-53

FRAME bit 4-55in VCACTL 3-53in VCBCTL 3-68

FREE bit 5-4

FRMC bit 3-50

FRMD bit 4-53

FRMHEIGHT bits 4-60

FRMWIDTH bits 4-60

FSCL2 bit 3-63

FSYNC bit 3-50

FXS bit 4-55

GO bit 6-6GPIO bit

in VPIE 2-21

in VPIS 2-24

GPIO registers 5-2

HBDLA bit 4-61HBLNKSTART bits 4-61HBLNKSTOP bits 4-61HIDATA bit 2-20HRLD bits 4-83HRST bit

in VCACTL 3-53

in VCBCTL 3-68HSYNCSTART bits 4-78HSYNCSTOP bits 4-78HXS bit 4-55

IMGHOFF1 bits 4-69IMGHOFF2 bits 4-71IMGHSIZE1 bits 4-70IMGHSIZE2 bits 4-73IMGVOFF1 bits 4-69IMGVOFF2 bits 4-71IMGVSIZE1 bits 4-70IMGVSIZE2 bits 4-73INCPIX bits 4-76INPCR bits 3-74INPCRE bits 3-75INPCRM bit 3-75interrupt operation 2-5

LFDA bit

in VPIE 2-21in VPIS 2-24

LFDB bit

in VPIE 2-21in VPIS 2-24

SPRU629

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual Index-3

Models: TMS320C64x DSP

Index

SPRU629

Index-3

TMS320C64x DSP specifications