Video Capture Registers

3.13.13 TSI Clock Initialization MSB Register (TSICLKINITM)

The transport stream interface clock initialization MSB register (TSICLKINITM) is used to initialize the hardware counter to synchronize with the system time clock. TSICLKINITM is shown in Figure 3–41 and described in Table 3–26.

On receiving the first packet containing a program clock reference (PCR) header, the DSP writes the most-significant bit (MSB) of the PCR and the 9-bit PCR extension into TSICLKINITM. This initializes the counter to the system time clock. TSICLKINITM should also be updated by the DSP whenever a discontinuity in the PCR field is detected.

To ensure synchronization and prevent false compare detection, the software should disable the system time clock interrupt (clear the STEN bit in TSICTL) prior to writing to TSICLKINITM. All bits of the system time counter are initial- ized whenever either TSICLKINITL or TSICLKINITM are written.

Figure 3–41. TSI Clock Initialization MSB Register (TSICLKINITM)

31

 

 

 

16

 

 

 

Reserved

 

 

 

 

 

 

 

 

 

R-0

 

15

10

9

1

0

 

 

 

 

 

 

Reserved

 

INPCRE

INPCRM

 

 

 

 

 

 

R-0

 

R/W-0

R/W-0

Legend: R = Read only; R/W = Read/Write; -n= value after reset

Table 3–26. TSI Clock Initialization MSB Register (TSICLKINITM) Field Descriptions

 

 

 

 

 

Description

Bit

field†

symval†

Value

BT.656, Y/C Mode,

TSI Mode

or Raw Data Mode

31–10

Reserved

–

0

Reserved. The reserved bit location is always read as 0. A

 

 

 

 

value written to this field has no effect.

 

 

 

 

 

 

9–1

INPCRE

OF(value)

0–1FFh

Not used.

Initializes the extension portion of the

 

 

 

 

 

system time clock.

 

 

 

 

 

 

0

INPCRM

OF(value)

0–1

Not used.

Initializes the MSB of the system time

 

 

 

 

 

clock.

 

 

† For CSL implementation, use the notation VP_TSICLKINITM_field_symval

 

SPRU629

Video Capture Port

3-75

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Image 137
Texas Instruments TMS320C64x DSP manual TSI Clock Initialization MSB Register Tsiclkinitm, Inpcrm, Inpcre
Page 136 Page 138

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

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For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

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In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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