Video Port FIFO

1.2 Video Port FIFO

The video port includes a FIFO to store data coming into or out from the video port. The video port operates in conjunction with DMA transfers to move data between the video port FIFO and external or on-chip memory. You can pro- gram threshold settings so DMA events are generated when the video port FIFO reaches a certain fullness (for capture) or goes below a certain fullness (for display). DMAs required to service the FIFO are set up independently by you and are key to correct operation of the video port. The FIFO size is relative- ly large to allow time for DMAs to service the transfer requests, since devices typically have many peripheral interfaces often including multiple video ports.

The following sections briefly describe the interaction with the DMA and differ- ent FIFO configurations used to support the various modes of the video port.

1.2.1DMA Interface

Video port data transfers take place using DMAs. DMA requests are based on buffer thresholds. Since the video port does not directly source the transfer, it can not adjust the transfer size based on buffer empty/full status. This means the DMA transfer size is essentially fixed in the user-programmed DMA parameter table. The preferred transfer size is often one entire line of data, because this allows the most flexibility in terms of frame buffer line pitch (in RAM). Some modes of operation for the highest display rates may require more frequent DMA requests such as on a half or quarter line basis.

All requests are based on buffer thresholds. In video capture mode, DMA requests are made whenever the number of samples in the buffer reaches the threshold value. In order to ensure that all data from a capture field/frame gets emptied from the buffer, the transfer size must be equal to the threshold and the total amount of field/frame data must be a multiple of the transfer size.

For video display operation, DMA requests are made whenever there is at least the threshold number of doublewords free in the FIFO. This means that the transfer size must be equal to or smaller than the threshold so that it fits into the available space. The field/frame size must still be a multiple of the transfer size or there are pixels left in the buffer at the end of the field (which appear at the start of the next field).

SPRU629

Overview

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Texas Instruments TMS320C64x DSP manual Video Port Fifo, DMA Interface
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TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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