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Texas Instruments TMS320C64x DSP manual Reset Operation, Power-On Reset, Peripheral Bus Reset

Models: TMS320C64x DSP

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Reset Operation

2.1 Reset Operation

The video port has several sources and types of resets. The actions performed by these resets and the state of the port following the resets is described in the following sections.

2.1.1Power-On Reset

Power-on reset is an asynchronous hardware reset caused by a chip-level reset operation. The reset is initiated by a power-on reset input to the video port. When the input is active, the port places all I/Os (VD[19–0], VCTL1, VCTL2, VCTL3, and VCLK2) in a high-impedance state.

2.1.2Peripheral Bus Reset

Peripheral bus reset is a synchronous hardware reset caused by a chip-level reset operation. The reset is initiated by a peripheral bus reset input to the video port. This reset can be used internally (continuously asserted) to disable the video port for low-power operation. When the input is active, the port does the following:

-Places (keeps) all I/Os (VD[19–0], VCTL1, VCTL2, VCTL3, and VCLK2) in a high-impedance state.

-Flushes the FIFOs (resets pointers)

-Resets all port, capture, display, and GPIO registers to their default values. These may not complete until the appropriate module clock (VCLK1, VCLK2, STCLK) edges occur to synchronously release the logic from reset.

-Clears PEREN bit in PCR to 0.

-Sets VPHLT bit in VPCTL to 1.

While the peripheral remains disabled (PEREN = 0):

-VCLK1, VCLK2, and STCLK are gated off to save peripheral power.

-Peripheral bus accesses are acknowledged (RREADY/WREADY returned) to prevent DMA lock-up. (Any value returned on reads, data accepted or discarded on writes.)

-Peripheral bus MMR interface allows access to GPIO registers only (PID,

PCR, PFUNC, PDIR, PIN, PDOUT, PDSET, PDCLR, PIEN, PIPOL, PISTAT, and PICLR).

-Port I/Os (VD[19–0], VCTL1, VCTL2, VCTL3, and VCLK2) remain in a high-impedance state unless enabled as GPIO by the PFUNC bits.

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Video Port

SPRU629

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Texas Instruments TMS320C64x DSP manual Reset Operation, Power-On Reset, Peripheral Bus Reset
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TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.