VDIMGHSIZE1 * VDIMGVSIZE1 | Texas Instruments TMS320C64x DSP

Example 2: Noncontinuous Frame Display for 525/60 Format

/* –––––––––––––––––––––––––––––––––––––––––– */
/* Define vertical synchronization for field2 */
/* –––––––––––––––––––––––––––––––––––––––––– */
#define VD_VSYNC_XSTART2	360
#define VD_VSYNC_YSTART2	266
#define VD_VSYNC_XSTOP2	360
#define VD_VSYNC_YSTOP2	269

/* –––––––––––––––––––––––––––––––––––––––– */
/* Define image offsets for both the fields */
/* which are zero in this example		*/
/* –––––––––––––––––––––––––––––––––––––––– */
#define VD_IMG_HOFF1	0
#define VD_IMG_VOFF1	0
#define VD_IMG_HOFF2	0
#define VD_IMG_VOFF2	0
/* ––––––––––––––––––––––––––––––––––––––––––––––––– */
/* Define image active vertical and horizontal sizes */
/* ––––––––––––––––––––––––––––––––––––––––––––––––– */
#define VD_IMG_HSIZE1	720 /* field1 horizontal image size		*/
#define VD_IMG_VSIZE1	244 /* field1 vertical image size		*/
#define VD_IMG_HSIZE2	720 /* field2 horizontal image size		*/
#define VD_IMG_VSIZE2	243 /* field2 vertical image size		*/
/* Manipulate field1 and field2 image sizes			*/
#define VD_IMAGE_SIZE1	(VD_IMG_HSIZE1 * VD_IMG_VSIZE1)
#define VD_IMAGE_SIZE2	(VD_IMG_HSIZE2 * VD_IMG_VSIZE2)
/* Define threshold values in double–words. Both fields should			*/
/* have same threshold value			*/
#define VD_VDTHRLD1	(VD_IMG_HSIZE1/8) /* line length in		*/
#define VD_VDTHRLD2	VD_VDTHRLD1	/* double–words	*/
/* Define number of events to be generated for field1 and field2			*/
#define VD_DISPEVT1	(VD_IMAGE_SIZE1 / (VD_VDTHRLD1 * 8))
#define VD_DISPEVT2	(VD_IMAGE_SIZE2 / (VD_VDTHRLD2 * 8))

#define DISPLAY_FRAME_COUNT	5 /* in this example	*/
/* –––––––––––––––––––––––––––––––––––––––––––– */
/* EDMA parameters for display Y event that are */
/* specific to this example.	*/

/* –––––––––––––––––––––––––––––––––––––––––––– */

#define VD_Y_EDMA_ELECNT	(VD_VDTHRLD1 * 2) /* VD_VDTHRLDn is in double–words
	and 32–bit element size */
#define VD_Y_EDMA_FRMCNT	((VD_DISPEVT1 + VD_DISPEVT2) *
	DISPLAY_FRAME_COUNT)

A-12

Video Port Configuration Examples

SPRU629

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual VDIMGHSIZE1 * VDIMGVSIZE1

Models: TMS320C64x DSP

(VD_IMG_HSIZE1 * VD_IMG_VSIZE1)

(VD_IMG_HSIZE2 * VD_IMG_VSIZE2)

VD_VDTHRLD1

(VD_IMAGE_SIZE2 / (VD_VDTHRLD2 * 8))

TMS320C64x DSP specifications