Index

registers (continued)

 

 

 

 

 

 

 

video display

 

 

 

 

 

 

 

frame size register (VDFRMSZ)

 

4-60

 

horizontal blanking register

 

 

 

 

 

(VDHBLNK)

4-61

 

 

 

 

 

 

horizontal synchronization register

 

 

(VDHSYNC)

4-78

 

 

 

 

 

 

recommended values 4-94

 

 

 

 

 

status register (VDSTAT)

4-53

 

 

 

 

threshold register (VDTHRLD)

4-76

 

vertical interrupt register (VDVINT)

4-88

Y FIFO destination register A (YDSTA)

4-96

Y FIFO destination register B (YDSTB)

4-96

video port 2-16

 

 

 

 

 

 

 

control register (VPCTL)

2-17

 

 

 

 

interrupt enable register (VPIE)

 

2-21

 

interrupt status register (VPIS)

2-24

 

peripheral control register (PCR)

5-4

 

peripheral identification register (VPPID)

5-3

pin data clear register (PDCLR)

 

5-17

 

pin data input register (PDIN)

5-11

 

 

pin data output register (PDOUT)

5-13

 

pin data set register (PDSET)

 

5-15

 

 

pin direction register (PDIR)

5-8

 

 

 

pin function register (PFUNC)

 

5-6

 

 

pin interrupt clear register (PICLR)

5-25

pin interrupt enable register (PIEN)

5-19

pin interrupt polarity register (PIPOL) 5-21

pin interrupt status register (PISTAT)

5-23

status register (VPSTAT)

2-20

 

 

 

 

related documentation from Texas Instruments

iii

reset operation 2-2

RESMPL 4-55

RESMPL bit

in VCACTL 3-53in VCBCTL 3-68

REVISION bits 5-3

RGBX 4-55

RSTCH bit 4-55in VCACTL 3-53in VCBCTL 3-68

RSYNC 4-55

S

SCALE bit 4-55

in VCACTL 3-53in VCBCTL 3-68

SERRA bit

in VPIE 2-21

in VPIS 2-24SERRB bit

in VPIE 2-21

in VPIS 2-24SFDA bit

in VPIE 2-21

in VPIS 2-24SFDB bit

in VPIE 2-21

in VPIS 2-24SFDE bit

in VCACTL 3-53

in VCBCTL 3-68SOFT bit 5-4software port reset 2-3SSE bit 3-58

STC bit

in VPIE 2-21

in VPIS 2-24STEN bit 3-72

T

TCKEN bit 3-72

throughput and latency 2-13TICK bit

in VPIE 2-21

in VPIS 2-24TICKCT bits 3-82trademarks iv TSI bit 2-17

TSI capture control register (TSICTL) 3-72

TSI capture mode

3-37

 

 

capture selection

3-40

 

 

capturing data

3-47

 

 

data capture 3-37

 

 

 

data capture notification

3-40

 

error detection

3-38

 

 

features 3-37

 

 

 

 

FIFO overrun

3-48

 

 

mode selection

3-2

 

 

reading from the FIFO

3-42

 

synchronizing the system clock

3-38

timestamp format (big endian)

3-42

timestamp format (little endian)

3-41

writing to the FIFO

3-41

 

Index-6

SPRU629

Page 301 Page 303
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Image 302
Texas Instruments TMS320C64x DSP manual Vdhblnk
Page 301 Page 303

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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