Video Input Filtering

Figure 3–16 shows an example of a capture window that is smaller than the BT.656 active line. Sample a is the first sample in the horizontal capture window and sample n is the last sample. In this case, any filtering done on the first sample location uses the m leading edge captured pixels (m is 3 in this example), and any filtering done on the last sample location uses the m trailing captured pixels. (From an implementation standpoint, the mirroring and filter- ing can still begin and end with SAV and EAV, but the samples before VCXSTART or after VCXSTOP must not be saved to the YCbCr buffers.)

Figure 3–16. Capture Window Not Requiring Edge Pixel Replication

XSTART

XSIZE

SAV

a–4 a–3 a–2 a–1 a b c d e

n–4 n–3 n–2 n–1 n n+1 n+2 n+3 n+4

EAV

Active line

a–4 a–3 a–1 a b c d e

n–4 n–3 n–2 n–1 n n+1 n+2 n+3

Leading edge replicated pixels

– Luma (Y) sample

Trailing edge replicated pixels

– Chromasamples (Cb/Cr)

3-30

Video Capture Port

SPRU629

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Texas Instruments TMS320C64x DSP manual Capture Window Not Requiring Edge Pixel Replication, Xstart Xsize SAV
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TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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