Raw Data Display Mode

4.6.1Raw Mode RGB Output Support

The raw data display mode has a special pixel count feature that allows the FPCOUNT increment rate to be set. FPCOUNT increments only when INCPIX samples have been sent out. This option allows proper tracking of the display pixels when sending out sequential RGB samples. (INCPIX would be set to three in this case, to indicate that a single pixel is represented by three output samples.)

Sequential RGB samples output are also supported through a special FIFO unpacking mode. When the 8-bit raw ¾ unpacking is selected (RGBX bit in VDCTL), three output bytes are selected from each word and the fourth byte is ignored. This allows the video port to correctly output data formatted as 24-bit RGB (or RGBα ) words in memory.

4.6.2Raw Data FIFO Unpacking

Display data is always packed into the FIFOs in 64-bit words and must be unpacked before being sent to the display data pipeline. The unpacking and byte ordering is dependant upon the display data size and the device endian mode. For little-endian operation (default), data is unpacked from right to left; for big-endian operation, data is unpacked from left to right.

The 8-bit raw mode uses a single data FIFO. Four samples are unpacked from each word as shown in Figure 4–25.

Figure 4–25. 8-Bit Raw FIFO Unpacking

VCLKOUT

 

 

 

VDOUT[9–2]Raw 0 Raw 1 Raw 2 Raw 3 Raw 4 Raw 5

Raw 6 Raw 7 Raw 8 Raw 9 Raw 10 Raw 11

 

 

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Big-Endian Unpacking

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Video Display Port

SPRU629

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Texas Instruments TMS320C64x DSP manual Raw Mode RGB Output Support, Raw Data Fifo Unpacking

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.