Texas Instruments TMS320C64x DSP manual Video Port Pin Data Out Register Pdout Field Descriptions

GPIO Registers

Table 5–7. Video Port Pin Data Out Register (PDOUT) Field Descriptions

Bit	field†	symval†	Value	Description
31–23	Reserved	–	0	Reserved. The reserved bit location is always read as 0. A
				value written to this field has no effect.
22	PDOUT22			PDOUT22 bit drives the VCTL3 pin only when the GPIO is
				configured as output.
				When reading data, returns the bit value in PDOUT22,
				does not return input from pin. When writing data, writes to
				PDOUT22 bit.
		VCTL3LO	0	Pin drives low.
		VCTL3HI	1	Pin drives high.
21	PDOUT21			PDOUT21 bit drives the VCTL2 pin only when the GPIO is
				configured as output.
				When reading data, returns the bit value in PDOUT21,
				does not return input from pin. When writing data, writes to
				PDOUT21 bit.
		VCTL2LO	0	Pin drives low.
		VCTL2HI	1	Pin drives high.
20	PDOUT20			PDOUT20 bit drives the VCTL1 pin only when the GPIO is
				configured as output.
				When reading data, returns the bit value in PDOUT20,
				does not return input from pin. When writing data, writes to
				PDOUT20 bit.
		VCTL1LO	0	Pin drives low.
		VCTL1HI	1	Pin drives high.
19–0	PDOUT[19–0]			PDOUT[19–0] bit drives the corresponding VDATA[19–0]
				pin only when the GPIO is configured as output.
				When reading data, returns the bit value in PDOUT[n],
				does not return input from pin. When writing data, writes to
				PDOUT[n] bit.
		VDATAnLO	0	Pin drives low.
		VDATAnHI	1	Pin drives high.

† For CSL implementation, use the notation VP_PDOUT_PDOUTn_symval

5-14 General Purpose I/O Operation SPRU629