Frmdis, Flddis | Texas Instruments TMS320C64x DSP guide

Video Display Registers

Table 4–7. Video Display Control Register (VDCTL) Field Descriptions (Continued)

				Description
Bit	field†	symval†	Value	BT.656 and Y/C Mode	Raw Data Mode
6	FRAME‡			Display frame bit.
		NONE	0	Do not display frame.
		FRMDIS	1	Display frame.

5	DF2‡			Display field 2 bit.
		NONE	0	Do not display field 2.
		FLDDIS	1	Display field 2.

4	DF1‡			Display field 1 bit.
		NONE	0	Do not display field 1.
		FLDDIS	1	Display field 1.

3	Reserved	–	0	Reserved. The reserved bit location is always read as 0. A value
				written to this field has no effect.

2–0	DMODE			Display mode select bit.
		BT656B	0	Enables 8-bit BT.656 mode.
		BT656D	1h	Enables 10-bit BT.656 mode.
		RAWB	2h	Enables 8-bit raw data mode.
		RAWD	3h	Enables 10-bit raw data mode.
		YC16	4h	Enables 8-bit Y/C mode.
		YC20	5h	Enables 10-bit Y/C mode.
		RAW16	6h	Enables 16-bit raw data mode.
		RAW20	7h	Enables 20-bit raw data mode.

†For CSL implementation, use the notation VP_VDCTL_field_symval

‡ For complete encoding of these bits, see Table 4–4.

SPRU629

Video Display Port

4-59

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

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Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual Frmdis, Flddis

Models: TMS320C64x DSP

Table 4–7. Video Display Control Register (VDCTL) Field Descriptions (Continued)

Bit

field†

Value

FRMDIS

FLDDIS

RAW20

Enables 20-bit raw data mode.

SPRU629

TMS320C64x DSP specifications