Texas Instruments TMS320C64x DSP Video Display Clipping Register Vdclip, Clipchigh, Clipclow

Models: TMS320C64x DSP

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Video Display Registers

4.12.23 Video Display Clipping Register (VDCLIP)

The video display clipping register (VDCLIP) is shown in Figure 4–61 and described in Table 4–28.

The video display module in the BT.656 and Y/C modes performs program- mable clipping. The clipping is performed as the last step of the video pipeline. It is applied only on the image areas defined by VDIMGSZn and VDIMGOFFn inside the active video area (blanking values are not clipped).

VDCLIP allows output values to be clamped within the specified values. The default values are the BT.601-specified peak black level of 16 and peak white level of 235 for luma and the maximum quantization levels of 16 and 240 for chroma. For 10-bit operation, the clipping is applied to the 8 MSBs of the value with the 2 LSBs cleared. (For example, a Y value of FF.8h is clipped to EB.0h and a Y value of 0F.4h is clipped to 10.0h.)

Figure 4–61. Video Display Clipping Register (VDCLIP)

31

24

23

16

CLIPCHIGH

 

 

CLIPCLOW

 

 

 

 

R/W-1111 0000

 

 

R/W-0001 0000

15

8

7

0

 

 

 

 

CLIPYHIGH

 

 

CLIPYLOW

 

 

 

 

R/W-1110 1011

 

 

R/W-0001 0000

Legend: R/W = Read/Write; -n= value after reset

 

 

 

Table 4–28. Video Display Clipping Register (VDCLIP) Field Descriptions

 

 

 

 

Description

 

Bit

field

symval

Value

BT.656 and Y/C Mode

Raw Data Mode

31–24

CLIPCHIGH

OF(value)

0–FFh

A Cb or Cr value greater than

Not used.

 

 

 

 

CLIPCHIGH is forced to the

 

 

 

 

 

CLIPCHIGH value.

 

 

 

 

 

 

 

23–16

CLIPCLOW

OF(value)

0–FFh

A Cb or Cr value less than

Not used.

 

 

 

 

CLIPCLOW is forced to the

 

 

 

 

 

CLIPCLOW value.

 

 

 

 

 

 

 

15–8

CLIPYHIGH

OF(value)

0–FFh

A Y value greater than CLIPYHIGH is

Not used.

 

 

 

 

forced to the CLIPYHIGH value.

 

 

 

 

 

 

 

7–0

CLIPYLOW

OF(value)

0–FFh

A Y value less than CLIPYLOW is

Not used.

 

 

 

 

forced to the CLIPYLOW value.

 

 

 

 

 

 

 

For CSL implementation, use the notation VP_VDCLIP_field_symval

SPRU629

Video Display Port

4-85

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Texas Instruments TMS320C64x DSP manual Video Display Clipping Register Vdclip, Clipchigh, Clipyhigh Clipylow, Clipclow

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.