Sync Signal Generation, Flcount | Texas Instruments TMS320C64x DSP

Video Display Mode Selection

Note that the signals can transition at any place along the video line (specified by the XSTART and XSTOP bits of the appropriate registers). In this case, VBLNK starts at horizontal count VBLNKXSTART2 = 429 on scan line VBLNKYSTART2 = 263 (565/60 operation).

Figure 4–6. Vertical Blanking, Sync and Even/Odd Frame Signal Timing

FLCOUNT

One Line

18	19	20

One Frame

263	264	265	266	267	268	269	270		282	283	284		524	525	1	2	3	4	5

VBLNK

FLCOUNT = VBLNKYSTOP1 FLCOUNT = VBLNKYSTART2 FPCOUNT = VBLNKXSTOP1 FPCOUNT = VBLNKXSTART2

FLCOUNT = VBLNKYSTOP2 FPCOUNT = VBLNKXSTOP2

FLCOUNT = VBLNKYSTART1

FPCOUNT = VBLNKXSTART1

VSYNC

FLCOUNT = VSYNCYSTOP1

FLCOUNT = VSYNCYSTART2

FLCOUNT = VSYNCYSTOP2

FLCOUNT = VSYNCYSTART1

FPCOUNT = VSYNCXSTOP1

FPCOUNT = VSYNCXSTART2

FPCOUNT = VSYNCXSTOP2

FPCOUNT = VSYNCXSTART1

FLD

Field 1

Field 2

FLCOUNT = FLD2YSTART

FLCOUNT = FLD1YSTART

FPCOUNT = FLD2XSTART

FPCOUNT = FLD1XSTART

4.1.3Sync Signal Generation

The video display module must generate a number of control signals for both internal and external use. As seen in section 4.1.2, the HSYNC, HBLNK, VSYNC, VBLNK, and FLD signals are generated directly from the pixel and line counters and comparison registers. Several additional signals are also generated indirectly for use in external control.

A composite blank (CBLNK) signal is generated as the logical-OR of the HBLNK and VBLNK signals. A composite sync (CSYNC) signal is also gener- ated as the logical-OR of the HSYNC and VSYNC signals. (This is not a true analog CSYNC, which must include serration pulses during VSYNC and equalization pulses during vertical front and back porch periods.) Finally, an active video (AVID) signal is generated. AVID is the inverted CBLNK signal indicating when active video data is being output.

Up to three of the eight sync signals may be output on VCTL1, VCTL2, and VCTL3 as selected by the video display control register (VDCTL). Each signal may be output in its noninverted or inverted form, as selected by the VCTnP bits in the video port control register (VPCTL).

SPRU629

Video Display Port

4-7

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual Sync Signal Generation, Flcount, Vblnk, Vsync, Fld

Models: TMS320C64x DSP