TSI Capture Mode

Figure 3–23. Program Clock Reference (PCR) Header Format

47

15

14

9

8

0

PCR

 

Reserved

 

PCR extension

 

 

 

 

 

 

The video port, in conjunction with the VCXO interpolated control (VIC), allows a combined hardware and software solution to synchronize the local system time clock (STC) with the encoder time clock reference transmitted in the bit stream.

The video port maintains a hardware counter that counts the system time. The counter is driven by a system time clock (STCLK) input driven by an external VCXO. The counter is split into two fields: a 33-bit field (PCR base) that counts at 90 kHz and a 9-bit field (PCR extension) that counts at 27 MHz. The 9-bit counter counts from 0 to 299 at 27 MHz. Each time the 9-bit counter rolls over to 0, the 33-bit counter is incremented by 1. This is equivalent to the PCR time- stamp transmitted in the bit-stream. The 33-bit field can also be programmed to count at 27 MHz for compatibility with the MPEG-1 32-bit PCR, by setting the CTMODE bit in VCCTL to 1; in which case, the PCR extension portion of the counter is not used. Figure 3–24 shows the system time clock counter operation.

Figure 3–24. System Time Clock Counter Operation

CTMODE

27 MHz

 

STCLK

1

 

 

External VCXO

Modulo 300

90 kHz

 

0

Counter 233

PCR Base

PCR Extension

On reception of a packet (during the sync byte), a snapshot of the counter is captured. This snapshot, or timestamp, is inserted in the receiving FIFO at the end of each data packet. Software uses this timestamp, to determine the devi- ation of the local system time clock from the encoder time clock. Any time a packet with a PCR header is received, the timestamp for that packet is compared with the PCR value by software. A PLL is implemented in software to synchronize the STCLK with the encoder time clock value in the PCR. This algorithm then drives the VIC, which drives the VDAC output to the external VCXO, which supplies STCLK.

SPRU629

Video Capture Port

3-39

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Texas Instruments TMS320C64x DSP manual Pcr, Ctmode
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TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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