Y/C Video Display Mode

4.3.2Y/C Blanking Codes

The time between the EAV and SAV code on each line represents the horizon- tal blanking interval. During this time, the video port outputs the digital video blanking values. These values are 10.0h for luma (Y) samples and 80.0h for chroma (Cb/Cr) samples. These values are also output during the active line period of vertical blanking (between SAV and EAV when V = 1), unless replaced by VBI data. In addition, if the DVEN bit in VDCTL is 0, the blanking values are output during the portion of active video lines that are not a part of the displayed image.

4.3.3Y/C Image Display

Many of the standards supported by the Y/C display mode provide for both interlaced and progressive scan formats. For interlaced display, the display controls are programmed identically to BT.656 mode. For progressive scan formats, the frame size is programmed to the size of a single field and only field 1 is used.

The Y/C display mode uses the same FIFO organization as the BT.656 display mode and generates DMA events in the same manner.

4.3.4Y/C FIFO Unpacking

Display data is always packed into the FIFOs in 64-bit words and must be unpacked before being sent to the display data pipeline. The unpacking and byte ordering is dependant upon the display data size and the device endian mode. For little-endian operation (default), data is unpacked from right to left; for big-endian operation, data is unpacked from left to right.

SPRU629

Video Display Port

4-17

Page 161 Page 163
Page 162
Image 162
Texas Instruments TMS320C64x DSP manual 2 Y/C Blanking Codes, 3 Y/C Image Display, 4 Y/C Fifo Unpacking
Page 161 Page 163

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
Top Page Image Contents