Y/C Video Display Mode | Texas Instruments TMS320C64x DSP instruction

Y/C Video Display Mode

4.3 Y/C Video Display Mode

The Y/C display mode is similar to the BT.656 display mode but outputs 8 or 10-bit data on separate luma and chroma data streams. One data stream contains Y samples and the other stream contains multiplexed Cb and Cr samples co-sited with every other luminance sample. The Y samples are read from the Y FIFO and the Cb and Cr samples are read from the Cb and Cr FIFOs and combined on the chroma output. The unpacking and order of the samples is determined by the sample size (8-bit or 10-bit) and the device endian mode.

The Y/C display mode can generate HDTV standard output such as BT.1120, SMPTE260, or SMPTE296 with embedded EAV and SAV codes. It can also output separate control signals.

Because 16 or 20 bits are used for data output, the Y/C output mode requires both halves of the video port data bus. If the DCHDIS bit in VPCTL is set, then Y/C mode cannot be selected.

4.3.1Y/C Display Timing Reference Codes

The EAV and SAV embedded timing codes are identical to those output in BT.656 mode and timing is controlled in the same manner. In Y/C mode, how- ever, the codes must be output on both the Y and C data streams (VDOUT[9–0] and VDOUT[19–10]). An example of BT.1120 line timing is shown in Figure 4–15.

Figure 4–15. Y/C Horizontal Blanking Timing (BT.1120 60I)

One Line

Next Line

FPCOUNT

1920

1921

1922

1923

1924

1925

1926

1927

2194

2195

2196

2197

2198

2199

1916

1917

1918

1919

1920

1921

1922

1923

1924

1925

1926

1927

VCLKOUT

272

1920

Blanking

Active Video

1916Y

VDOUT[9–0]

FF.C 00.0 00.0

XY.0

10.0

FF.C 00.0

00.0

XY.0

Y 0

Y 1

Y 2

Y 3

Y 4

Y 5

Y 1917

Y 1918

Y 1919

FF.C

00.0

XY.0

10.0

EAV

Blanking Data

SAV

EAV

VDOUT[19–10]	FF.C	00.0	00.0	XY.0	80.0	80.0	80.0	80.0	80.0	80.0	FF.C	00.0	00.0	XY.0	Cb0	Cr0	Cb1	Cr1	Cb2

Cr 2		Cb 958

Cr 958

Cb 959

Cr 959

FF.C

00.0

XY.0

80.0

EAV

Blanking Data

SAV

EAV

4-16

Video Display Port

SPRU629

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP Y/C Video Display Mode, 1 Y/C Display Timing Reference Codes

Models: TMS320C64x DSP

4.3 Y/C Video Display Mode

4.3.1Y/C Display Timing Reference Codes

Figure 4–15. Y/C Horizontal Blanking Timing (BT.1120 60I)

TMS320C64x DSP specifications