Rgbx, Blanking | Texas Instruments TMS320C64x DSP specs

Video Display Registers

Table 4–7. Video Display Control Register (VDCTL) Field Descriptions (Continued)

				Description
Bit	field†	symval†	Value	BT.656 and Y/C Mode	Raw Data Mode
13	RGBX			RGB extract enable bit.
		DISABLE	0	Not used.
		DISABLE	0	Not used.
		ENABLE	1	Not used.	Perform ¾ FIFO unpacking.

12	RSYNC			Second, synchronized raw data channel enable bit.
		DISABLE	0	Not used.	Second, synchronized raw data
		DISABLE	0	Not used.	Second, synchronized raw data
					channel is disabled.
		ENABLE	1	Not used.	Second, synchronized raw data
					channel is enabled.

11	DVEN			Default value enable bit.
		BLANKING	0	Blanking value is output during	Not used.
		BLANKING	0	Blanking value is output during	Not used.
				non-sourced active pixels.
		DV	1	Default value is output during	Not used.
				non-sourced active pixels.

10	RESMPL			Chroma resampling enable bit.
		DISABLE	0	Chroma resampling is disabled.	Not used.
		DISABLE	0	Chroma resampling is disabled.	Not used.
		ENABLE	1	Chroma is horizontally	Not used.
				resampled from 4:2:0
				interspersed to 4:2:2 co-sited
				before output.

9	Reserved	–	0	Reserved. The reserved bit location is always read as 0. A value
				written to this field has no effect.

8	SCALE			Scaling select bit.
		NONE	0	No scaling	Not used.
		NONE	0	No scaling	Not used.
		X2	1	2⋅ scaling	Not used.

7	CON‡			Continuous display enable bit.
		DISABLE	0	Continuous display is disabled.
		ENABLE	1	Continuous display is enabled.

†For CSL implementation, use the notation VP_VDCTL_field_symval

‡ For complete encoding of these bits, see Table 4–4.

4-58

Video Display Port

SPRU629

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.

Texas Instruments TMS320C64x DSP manual Rgbx, Blanking

Models: TMS320C64x DSP

Table 4–7. Video Display Control Register (VDCTL) Field Descriptions (Continued)

Bit

field†

BT.656 and Y/C Mode

RGBX

DISABLE

DISABLE

BLANKING

DISABLE

CON‡

DISABLE

Continuous display is enabled.

TMS320C64x DSP specifications