Texas Instruments TMS320C64x DSP manual Y/C Video Capture Fifo Capacity, Bit Bit Dense 10-Bit

Video Port Throughput and Latency

Table 2–2. Y/C Video Capture FIFO Capacity

Sample	8-Bit	10-Bit Dense	10-Bit
Y Samples	2560	1920	1280
Cb Samples	1280	960	640
Cr Samples	1280	960	640

Using these values and the formula above, the maximum time to empty the FIFO (tO) may be calculated for each case. The DMA output rate (rO) is then calculated as the FIFO size divided by tO :

8-bit (n = 1):

tO < tF + n(tH)

tO < 2560/74.25 MHz + 1(3.77 ∝ s)

tO < 38.3 ∝ s

rO = tO/5120 = 7.4 ns (134 MBytes/s)

10-bit dense (n = 1): tO < tF + n(tH)

tO < 1920/74.25 MHz + 1(3.77 ∝ s)

tO < 29.63 ∝ s

rO = tO/5120 = 5.79 ns (173 MBytes/s)

10-bit (n = 0):	tO < tF + n(tH)
	tO < 1280/74.25 MHz
	tO < 17.24 ∝ s
	rO = tO/5120 = 3.37 ns (297 MBytes/s)

A DMA read throughput of at least 300 MBytes/s is required for the highest capture rate operation supported by 20-bit implementations of the video port. C64x devices including the video port typically have more than enough DMA bandwidth to support the highest throughput required by a single video port. However when using multiple high-bandwidth peripherals together, it is impor- tant to consider the total DMA throughput required by the peripherals being used concurrently.

2-14 Video Port SPRU629