Video Capture Registers

Table 3–15. Video Capture Channel A Control Register (VCACTL)

Field Descriptions (Continued)

 

 

 

 

 

Description

 

Bit

field†

symval†

Value

BT.656 or Y/C Mode

Raw Data Mode

TSI Mode

18

FLDD

 

 

Field detect method bit. (Channel A only)

 

 

 

EAVFID

0

1st line EAV or FID

Not used.

Not used.

 

 

 

 

input.

 

 

FDL

1

Field detect logic.

Not used.

Not used.

17 VRST

 

VCOUNT reset method bit.

V1EAV

0

Start of vertical blank

 

Not used.

 

 

 

(1st V = 1 EAV or

 

 

 

 

VCTL2 active edge)

 

 

V0EAV

1

End of vertical blank

 

Not used.

 

 

(1st V = 0 EAV or

 

 

 

 

VCTL2 inactive edge)

 

 

 

 

 

 

 

Not used.

Not used.

16 HRST

 

HCOUNT reset method bit.

EAV

0

EAV or

 

Not used.

 

 

 

VCTL1 active edge.

 

 

SAV

1

SAV or

 

Not used.

 

 

VCTL1 inactive edge.

 

 

 

 

 

 

 

Not used.

Not used.

15 VCEN

 

Video capture enable bit. Other bits in VCACTL (except RSTCH

 

 

and BLKCAP bits) may only be changed when VCEN = 0.

DISABLE

0

Video capture is disabled.

ENABLE

1

Video capture is enabled.

14–13 PK10B

 

10-bit packing format select bit.

ZERO

0

Zero extend

 

Zero extend

 

SIGN

1h

Sign extend

 

Sign extend

DENSEPK

2h

Dense pack (zero

 

Dense pack (zero

 

 

extend)

 

extend)

–

3h

Reserved

 

Reserved

 

 

 

 

 

Not used.

Not used.

Not used.

Not used.

† For CSL implementation, use the notation VP_VCACTL_field_symval

‡For complete encoding of these bits, see Table 3–6, Table 3–11, and Table 3–12.

SPRU629

Video Capture Port

3-55

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Texas Instruments TMS320C64x DSP manual Eavfid, Fdl, V1EAV, V0EAV, Zero, Sign, Densepk
Page 116 Page 118

TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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