BT.656 and Y/C Mode Field and Frame Operation

The field detect method uses HYSNC and VSYNC based field detect logic. This is used for BT.656 or Y/C systems that provide only HSYNC and VSYNC. The field detect logic samples the state of the HSYNC input on the VSYNC active edge. If HSYNC is active on the active VSYNC edge, then field 1 is detected; if HSYNC is inactive on the active VSYNC edge, then field 2 is detec- ted. Because of slight timing variations, the VSYNC transition may not coincide exactly with the HSYNC transition. The detection logic should implement a

±64 clock detection window around HSYNC. If both HSYNC and VSYNC leading edges occur within 64 cycles of each other, then field 1 is detected; otherwise, field 2 is assumed. This is shown in Figure 3–11 for active-low sync signals.

Figure 3–11.Field 1 Detection Timing

VCLKIN

VSYNC#

(VCTL2)

64 Clocks64 Clocks

HSYNC#

(VCTL1)

3.4.5Short and Long Field Detect

The short and long field detect logic is used to notify the DSP when a captured field shorter or longer than expected. Detection is enabled by the SFDE and LFDE bits in VCxCTL. The SFD and LFD bits in VPIS indicate when a short or long field occurred and trigger an interrupt to the DSP if enabled.

If a vertical blanking period is detected before the end of the capture field, a short field is detected . If EAV is used for vertical sync (EXC = 0), then a short field is detected when an EAV with V = 1 occurs on or before VCOUNT = VCYSTOPn. If the VCTL2 input is used for vertical sync (EXC = 1), then a short field is detected if a VCTL2 active edge occurs before VCOUNT = VCYSTOPn.

If a vertical blanking period occurs more than 1 line past the end of the capture field, a long field is detected. A long field is detected when VCOUNT = VCYSTOPn + 1. (A long field is only detected when the VRST bit in VCxCTL is cleared to 0; when VRST = 1, a long field is always detected.) Long field detection cannot be used if the capture window is a vertical subset of the field that crops lines at the bottom. Such a window would always result in a long field detection. If VCTL2 is used for vertical sync, then the VCTL2 sig- nal must represent VBLNK (vertical blank) for proper long field detect. If

SPRU629

Video Capture Port

3-25

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Texas Instruments TMS320C64x DSP manual Field 1 Detection Timing, Short and Long Field Detect
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TMS320C64x DSP specifications

The TMS320C64x DSP family from Texas Instruments represents a significant milestone in the realm of digital signal processing. Launched as part of the C6000 series, the C64x DSPs are designed for high-performance applications requiring intensive computational capabilities, such as telecommunications, audio processing, video processing, and industrial control systems.

One of the standout features of the TMS320C64x DSP is its VLIW (Very Long Instruction Word) architecture, which allows for an exceptionally high level of parallelism. This architecture enables multiple instructions to be executed simultaneously, boosting the overall throughput and allowing for complex data processing tasks to be completed more quickly than with conventional DSPs.

The C64x DSPs also boast an impressive clock frequency range, typically up to 1 GHz, delivering substantial computational power for real-time processing goals. Additionally, these processors feature extensive on-chip memory, including L1 and L2 cache, which significantly enhances data access speeds and helps reduce bottlenecks during high-demand processing tasks.

Another key characteristic of the TMS320C64x family is its support for advanced instruction sets optimized for specific applications. These include SIMD (Single Instruction, Multiple Data) capabilities, allowing for efficient handling of large datasets often involved in multimedia processing or complex signal manipulation.

For connectivity, these DSPs often integrate advanced interfaces such as EMIF (External Memory Interface) and McBSP (Multichannel Buffered Serial Port), facilitating seamless interaction with a variety of peripheral devices. This ensures that the DSP can suit different application needs and integrate well into various system architectures.

Texas Instruments emphasizes low power consumption with the C64x DSPs, making them ideal for portable or energy-sensitive applications. Advanced power management techniques and technologies, such as dynamic voltage and frequency scaling, are incorporated to further enhance energy efficiency without compromising performance.

In summary, the Texas Instruments TMS320C64x DSP family stands out due to its high-performance capabilities driven by a VLIW architecture, high clock speeds, extensive memory options, a rich instruction set, and advanced connectivity features, all while maintaining power efficiency. These characteristics make it an exceptional choice for developers looking to integrate robust digital signal processing into their applications, whether in telecommunications, audio and video processing, or embedded control systems.
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